Order Total (1 Item Items):
Shipping Destination:
Overhauser David (39 results)
Skip to main search results
Search filters
Product Type
- All Product Types
- Books (39)
- Magazines & Periodicals (No further results match this refinement)
- Comics (No further results match this refinement)
- Sheet Music (No further results match this refinement)
- Art, Prints & Posters (No further results match this refinement)
- Photographs (No further results match this refinement)
- Maps (No further results match this refinement)
- Manuscripts & Paper Collectibles (No further results match this refinement)
Condition Learn more
- New (27)
- As New, Fine or Near Fine (7)
- Very Good or Good (4)
- Fair or Poor (No further results match this refinement)
- As Described (1)
Binding
Collectible Attributes
- First Edition (2)
- Signed (No further results match this refinement)
- Dust Jacket (No further results match this refinement)
- Seller-Supplied Images (12)
- Not Print on Demand (27)
Language (2)
Free Shipping
Seller Location
Seller Rating
-
Paperback. Condition: As New. No Jacket. Pages are clean and are not marred by notes or folds of any kind. ~ ThriftBooks: Read More, Spend Less.
-
hardcover. Condition: Good. Connecting readers with great books since 1972! Used textbooks may not include companion materials such as access codes, etc. May have some wear or writing/highlighting. We ship orders daily and Customer Service is our top priority!
-
Condition: New.
-
-
Condition: As New. Unread book in perfect condition.
-
Digital Timing Macromodeling for VLSI Design Verification (Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture and Digital Signal Processing)
Language: English
Published by Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A., 1995
ISBN 10: 0792395808 ISBN 13: 9780792395805
Seller: PsychoBabel & Skoob Books, Didcot, United Kingdom
Seller rating 5 out of 5 stars
First Edition
hardcover. Condition: Very Good. Dust Jacket Condition: No Dust Jacket. First Edition. White hardcover with white lettering on spine and upper board and contents in very good clean condition, showing minimal signs of wear. Previous owner's name on FEP. Profusely illustrated by diagrams and tables. No dust jacket. T. Used.
-
Switch-Level Timing Simulation of MOS VLSI Circuits (The Kluwer International Series in Engineering and Computer Science; 66. VLSI, Computer Architecture and Digital Signal Processing)
Language: English
Published by Kluwer Academic Publishers, Norwell, Massachusetts, U.S.A., 1989
ISBN 10: 0898383021 ISBN 13: 9780898383027
Seller: PsychoBabel & Skoob Books, Didcot, United Kingdom
Seller rating 5 out of 5 stars
First Edition
hardcover. Condition: Very Good. Dust Jacket Condition: No Dust Jacket. First Edition. White hardcover with black lettering on spine and upper board and contents in very good clean condition, showing minimal signs of wear. Previous owner's name on FEP. Profusely illustrated by diagrams and tables. No dust jacket. T. Used.
-
Build Something Great!: Fifty Best Tips for High-Tech Startups
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
Seller rating 5 out of 5 stars
Condition: New.
-
Digital Timing Macromodeling for VLSI Design Verification
Published by Kluwer Academic Publishers 1995, 1995
ed. hardback very good condition with a pen name on the free front end page- no dust jacket.
-
Build Something Great!: Fifty Best Tips for High-Tech Startups
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
Seller rating 5 out of 5 stars
Condition: As New. Unread book in perfect condition.
-
Build Something Great!: Your Reference Manual of the Best Tips for Startups
Language: English
Published by LIGHTNING SOURCE INC, 2015
ISBN 10: 0997082003 ISBN 13: 9780997082005
Condition: New. Über den AutorDavid Overhauser, Ph.D., began working with startups in 1980. He has been involved in over 20 startups in a variety of roles over 35 years, including engineer, Vice President, Founder, Board Member, investor, co.
-
Switch-Level Timing Simulation of MOS VLSI Circuits (The Springer International Series in Engineering and Computer Science, 66)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
£ 96.15
£ 11.98 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
Switch-Level Timing Simulation of MOS VLSI Circuits (The Springer International Series in Engineering and Computer Science, 66)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
£ 96.15
£ 11.98 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
Condition: Gut. Zustand: Gut | Seiten: 292 | Sprache: Englisch | Produktart: Bücher | Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timing, switch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels. The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.
-
Condition: New. pp. 224.
-
Condition: New. pp. 224.
-
Condition: New. Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In thos.
-
Condition: New. Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In thos.
-
Digital Timing Macromodeling for VLSI Design Verification (The Springer International Series in Engineering and Computer Science)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
£ 136.79
£ 11.98 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
Digital Timing Macromodeling for VLSI Design Verification (The Springer International Series in Engineering and Computer Science, 319)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
£ 136.79
£ 11.98 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
Hardcover. Condition: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
-
Paperback. Condition: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
-
Condition: New. pp. 294 Index.
-
Condition: New. pp. 292 Index.
-
Digital Timing Macromodeling for VLSI Design Verification
Language: English
Published by Springer US, Springer New York, 2012
ISBN 10: 1461359821 ISBN 13: 9781461359821
Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents detailed discussion of the various techniques implemented in circuit, timing, fast-timing, switch-level timing, switch-level, and gate-level simulation. It also discusses mixed-mode simulation and interconnection analysis methods. The review in Chapter 2 gives an understanding of the advantages and disadvantages of the many techniques applied in modern digital macromodels. The book also presents a wide variety of techniques for performing nonlinear macromodeling of digital MOS subcircuits which address a large number of shortcomings in existing digital MOS macromodels. Specifically, the techniques address the device model detail, transistor coupling capacitance, effective channel length modulation, series transistor reduction, effective transconductance, input terminal dependence, gate parasitic capacitance, the body effect, the impact of parasitic RC-interconnects, and the effect of transmission gates. The techniques address major sources of errors in existing macromodeling techniques, which must be addressed if macromodeling is to be accepted in commercial CAD tools by chip designers. The techniques presented in Chapters 4-6 can be implemented in other macromodels, and are demonstrated using the macromodel presented in Chapter 3. The new techniques are validated over an extremely wide range of operating conditions: much wider than has been presented for previous macromodels, thus demonstrating the wide range of applicability of these techniques.
-
Paperback. Condition: Like New. Like New. book.
-
Hardcover. Condition: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
-
Condition: New. Print on Demand pp. 224 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
-
Condition: New. Print on Demand pp. 224 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
-
Condition: New. PRINT ON DEMAND pp. 224.
