Kalaiselvi Sundaram (37 results)
Architectures arithmétiques approximatives CMOS à faible encombrement (French Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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Architectures arithm?tiques approximatives CMOS ? faible encombrement
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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Architectures arithm?tiques approximatives CMOS ? faible encombrement
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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Architetture aritmetiche approssimate efficienti in area CMOS (Italian Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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CMOS flächeneffiziente approximative Arithmetikarchitekturen (German Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Arquitecturas aritméticas aproximadas eficientes em termos de área CMOS (Portuguese Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Architectures arithmétiques approximatives CMOS à faible encombrement (French Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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CMOS fl?cheneffiziente approximative Arithmetikarchitekturen
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Architetture aritmetiche approssimate efficienti in area CMOS
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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Arquitecturas aritm?ticas aproximadas eficientes em termos de ?rea CMOS
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU)
Krishnasamy Natarajan, Vijeyakumar/ Sundaram, Kalaiselvi/ Bojan, Vinoth kumar
- Softcover
Seller: Revaluation Books, Exeter, United KingdomRevaluation Books
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Paperback. Condition: Brand New. 52 pages. 8.66x5.91x0.12 inches. In Stock.
CMOS fl?cheneffiziente approximative Arithmetikarchitekturen
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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Arquitecturas aritm?ticas aproximadas eficientes em termos de ?rea CMOS
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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Architetture aritmetiche approssimate efficienti in area CMOS
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Arquitecturas aritméticas aproximadas eficientes em termos de área CMOS (Portuguese Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Architetture aritmetiche approssimate efficienti in area CMOS (Italian Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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CMOS flächeneffiziente approximative Arithmetikarchitekturen (German Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Seller: preigu, Osnabrück, Germanypreigu
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Taschenbuch. Condition: Neu. Low Power CMOS Approximate Voting Architecture for Reliable Computing | Kalaiselvi Sundaram (u. a.) | Taschenbuch | 56 S. | Englisch | 2018 | LAP LAMBERT Academic Publishing | EAN 9786139845651 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod…[dot]de | Anbieter: preigu.
Architetture aritmetiche approssimate efficienti in area CMOS: DE
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
Seller: Buchpark, Trebbin, GermanyBuchpark
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Condition: Hervorragend. Zustand: Hervorragend | Seiten: 56 | Sprache: Italienisch | Produktart: Bücher | Il calcolo approssimato fornisce una soluzione alternativa per ridurre il consumo energetico degli attuali dispositivi DSP ad alte prestazioni. Le tecniche convenzionali di moltiplicazione e addizione consumano molta energia…. In questo breve lavoro si esamina la progettazione di unità aritmetiche approssimate per applicazioni di elaborazione del segnale. In primo luogo viene proposto un sommatore approssimato modificando la logica della cella sommatore completa di base. La cella adder proposta ha un numero di transistor inferiore rispetto a un approccio simile recente. Successivamente, viene progettato un moltiplicatore approssimato a basso errore utilizzando il rilevamento del lead one e selezionando n/2 bit per un ingresso di n bit. Il moltiplicatore approssimato a n/2 bit proposto si comporta bene in termini di errore e potenza rispetto a un approccio simile recente. Inoltre, le unità approssimate sono implementate in un'unità Multiply-Accumulate (MAC). L'unità MAC approssimata proposta offre un miglioramento significativo in termini di potenza, area e ritardo, a costo di un lieve peggioramento dell'accuratezza. Infine, l'unità MAC proposta viene implementata in un'applicazione di filtraggio per verificarne la funzionalità.
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Language: English
Published by LAP LAMBERT Academic Publishing Jun 2018, 2018
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Soft errors have a predominant role in the design of integrated electronic circuits. Modular Redundancy is a technique used to suppress the effects caused by soft error. In conventional Triple Modular Redundancy scheme, voter genera…tes error if majority cannot be detected. Introducing approximations in the conventional schemes reduces the error probability. The book presents the design of approximate scheme for alleviating the soft error by combining Inexact Double Modular Redundancy and Approximate Triple Modular Redundancy. The Approximate TMR module overcomes this problem by mediating the output instead of generating error. The scheme is designed using Cadence EDA tool with 180nm technology. Parameter analysis revealed power of the approximate design is being reduced by 49.11% from the existing design. 56 pp. Englisch.
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Low Power CMOS Approximate Voting Architecture for Reliable Computing
Kalaiselvi Sundaram|Vijeyakumar Krishnasamy Natarajan|Saravanakumar Natarajan
- Softcover
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Sundaram KalaiselviMs.S.Kalaiselvi completed her Under graduation in ECE in the year 2011 and Masters in Engineering in Applied Electronics under Anna University, Chennai. She has published 5 journals a…nd presented papers in more t.
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CMOS Area Efficient Approximate Arithmetic Architectures
Vijeyakumar Krishnasamy Natarajan|Kalaiselvi Sundaram|Hamsathvani Gurunathan
- Softcover
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarK.N.Vijeyakumar has completed his ME in Applied Electronics at GCT, Coimbatore. He has completed his research in CMOS Processor Design for Signal and Image Processing Ap…plications. He has published re.
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ASIC Implementation of Low Power FP-AU using Reversible Logic
Vijeyakumar Krishnasamy Natarajan|Kalaiselvi Sundaram|Vinoth kumar Bojan
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarDr.K.N. Vijeyakumar is working as an Associate Professor in Dr.Mahalingam College of Engineering and Technology, Coimbatore, Tamilnadu. His area of interest include ASIC… design, low power VLSI design.
Architectures arithm?tiques approximatives CMOS ? faible encombrement (French Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Architectures arithm?tiques approximatives CMOS ? faible encombrement (French Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
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Seller: Books Puddle, New York, NY, U.S.A.Books Puddle
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Architectures arithm?tiques approximatives CMOS ? faible encombrement (French Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
- Softcover
- Print on Demand
Seller: Biblios, frankfurt am main, HESSE, GermanyBiblios
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Language: English
Published by LAP LAMBERT Academic Publishing Jun 2018, 2018
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Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Soft errors have a predominant role in the design of integrated electronic circuits. Modular Redundancy is a technique used to suppress the effects caused by soft error. In conventional Triple Modular Redundancy scheme, voter generates…error if majority cannot be detected. Introducing approximations in the conventional schemes reduces the error probability. The book presents the design of approximate scheme for alleviating the soft error by combining Inexact Double Modular Redundancy and Approximate Triple Modular Redundancy. The Approximate TMR module overcomes this problem by mediating the output instead of generating error. The scheme is designed using Cadence EDA tool with 180nm technology. Parameter analysis revealed power of the approximate design is being reduced by 49.11% from the existing design.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 56 pp. Englisch.
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Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Soft errors have a predominant role in the design of integrated electronic circuits. Modular Redundancy is a technique used to suppress the effects caused by soft error. In conventional Triple Modular Redundancy scheme, voter generates e…rror if majority cannot be detected. Introducing approximations in the conventional schemes reduces the error probability. The book presents the design of approximate scheme for alleviating the soft error by combining Inexact Double Modular Redundancy and Approximate Triple Modular Redundancy. The Approximate TMR module overcomes this problem by mediating the output instead of generating error. The scheme is designed using Cadence EDA tool with 180nm technology. Parameter analysis revealed power of the approximate design is being reduced by 49.11% from the existing design.
Arquitecturas aritm?ticas aproximadas eficientes em termos de ?rea CMOS (Portuguese Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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Arquitecturas aritm?ticas aproximadas eficientes em termos de ?rea CMOS (Portuguese Edition)
Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Gurunathan, Hamsathvani
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