Low Power CMOS Approximate Voting Architecture for Reliable Computing

Language: English

Published by LAP LAMBERT Academic Publishing Jun 2018, 2018

6139845653 / 9786139845651

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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.

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This item is printed on demand - it takes 3-4 days longer - Neuware -Soft errors have a predominant role in the design of integrated electronic circuits. Modular Redundancy is a technique used to suppress the effects caused by soft error. In conventional Triple Modular Redundancy scheme, voter generates error if majority cannot be detected. Introducing approximations in the conventional schemes reduces the error probability. The book presents the design of approximate scheme for alleviating the soft error by combining Inexact Double Modular Redundancy and Approximate Triple Modular Redundancy. The Approximate TMR module overcomes this problem by mediating the output instead of generating error. The scheme is designed using Cadence EDA tool with 180nm technology. Parameter analysis revealed power of the approximate design is being reduced by 49.11% from the existing design. 56 pp. Englisch.

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Title
Low Power CMOS Approximate Voting Architecture for Reliable Computing
Author
Kalaiselvi Sundaram
Publisher
LAP LAMBERT Academic Publishing Jun 2018
Publication year
2018
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
6139845653
ISBN 13
9786139845651
Item weight
102 grams
Dimensions
220x150x4 mm

BuchWeltWeit Ludwig Meier e.K.

Bergisch Gladbach, Germany

5-star seller

AbeBooks seller since January 11, 2012

Shipping rates from Germany to U.S.A.

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BuchWeltWeit Ludwig Meier e.K.

Germany