ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU) - Softcover
Synopsis
This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.
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ASIC Implementation of Low Power FP-AU using Reversible Logic
Published by
LAP LAMBERT Academic Publishing Apr 2018, 2018
ISBN 10: 6139587050
ISBN 13: 9786139587056
New
Taschenbuch
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germany
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work. 52 pp. Englisch. Seller Inventory # 9786139587056
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ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU)
Published by
LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050
ISBN 13: 9786139587056
New
Paperback
Seller: Revaluation Books, Exeter, United Kingdom
Seller rating 5 out of 5 stars
Paperback. Condition: Brand New. 52 pages. 8.66x5.91x0.12 inches. In Stock. Seller Inventory # zk6139587050
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ASIC Implementation of Low Power FP-AU using Reversible Logic
Published by
LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050
ISBN 13: 9786139587056
New
Softcover
Seller: moluna, Greven, Germany
Seller rating 4 out of 5 stars
Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarDr.K.N. Vijeyakumar is working as an Associate Professor in Dr.Mahalingam College of Engineering and Technology, Coimbatore, Tamilnadu. His area of interest include ASIC design, low power VLSI design. Seller Inventory # 385865002
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ASIC Implementation of Low Power FP-AU using Reversible Logic
Published by
LAP LAMBERT Academic Publishing Apr 2018, 2018
ISBN 10: 6139587050
ISBN 13: 9786139587056
New
Taschenbuch
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. Neuware -This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.Books on Demand GmbH, Überseering 33, 22297 Hamburg 52 pp. Englisch. Seller Inventory # 9786139587056
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ASIC Implementation of Low Power FP-AU using Reversible Logic : Floating Point (FP)-Arithmetic Units (AU)
Published by
LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050
ISBN 13: 9786139587056
New
Taschenbuch
Seller: AHA-BUCH GmbH, Einbeck, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work. Seller Inventory # 9786139587056
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ASIC Implementation of Low Power FP-AU using Reversible Logic | Floating Point (FP)-Arithmetic Units (AU)
Published by
LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050
ISBN 13: 9786139587056
New
Taschenbuch
Seller: preigu, Osnabrück, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. ASIC Implementation of Low Power FP-AU using Reversible Logic | Floating Point (FP)-Arithmetic Units (AU) | Vijeyakumar Krishnasamy Natarajan (u. a.) | Taschenbuch | 52 S. | Englisch | 2018 | LAP LAMBERT Academic Publishing | EAN 9786139587056 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu. Seller Inventory # 113655891