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Language: English
Published by CRC Press, Boca Raton, FL, 1997
ISBN 10: 0849394503 ISBN 13: 9780849394508
Seller: Dorley House Books, Inc., Hagerstown, MD, U.S.A.
First Edition
Hardcover. Condition: Near Fine. B/W Photos; Diagrams, Etc (illustrator). 1st. 1st printing; glossy pictorial c; 307 clean, unmarked pages.
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Condition: New.
Language: English
Published by Taylor & Francis Ltd, 2020
ISBN 10: 0367400979 ISBN 13: 9780367400972
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Seller: GreatBookPricesUK, Woodford Green, United Kingdom
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Language: English
Published by Taylor & Francis Ltd, 2019
ISBN 10: 0367400979 ISBN 13: 9780367400972
Seller: Revaluation Books, Exeter, United Kingdom
Paperback. Condition: Brand New. 336 pages. 10.00x7.01x0.67 inches. In Stock.
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Condition: New.
Language: English
Published by CRC Press 1997-04-24, 1997
ISBN 10: 0849394503 ISBN 13: 9780849394508
Seller: Chiron Media, Wallingford, United Kingdom
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Language: English
Published by Taylor & Francis Inc, 1997
ISBN 10: 0849394503 ISBN 13: 9780849394508
Seller: THE SAINT BOOKSTORE, Southport, United Kingdom
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Language: English
Published by Taylor & Francis Group, 1997
ISBN 10: 0849394503 ISBN 13: 9780849394508
Seller: Books Puddle, New York, NY, U.S.A.
Condition: New. pp. 336 1st Edition.
Language: English
Published by Taylor & Francis Group, 1997
ISBN 10: 0849394503 ISBN 13: 9780849394508
Seller: Biblios, Frankfurt am main, HESSE, Germany
Condition: New. pp. 336.
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Buch. Condition: Neu. Neuware - This book raises the level of understanding of thermal design criteria. It provides the design team with sufficient knowledge to help them evaluate device architecture trade-offs and the effects of operating temperatures. The author provides readers a sound scientific basis for system operation at realistic steady state temperatures without reliability penalties. Higher temperature performance than is commonly recommended is shown to be cost effective in production for life cycle costs.The microelectronic package considered in the book is assumed to consist of a semiconductor device with first-level interconnects that may be wirebonds, flip-chip, or tape automated bonds; die attach; substrate; substrate attach; case; lid; lid seal; and lead seal. The temperature effects on electrical parameters of both bipolar and MOSFET devices are discussed, and models quantifying the temperature effects on package elements are identified. Temperature-related models have been used to derive derating criteria for determining the maximum and minimum allowable temperature stresses for a given microelectronic package architecture.The first chapter outlines problems with some of the current modeling strategies. The next two chapters present microelectronic device failure mechanisms in terms of their dependence on steady state temperature, temperature cycle, temperature gradient, and rate of change of temperature at the chip and package level. Physics-of-failure based models used to characterize these failure mechanisms are identified and the variabilities in temperature dependence of each of the failure mechanisms are characterized. Chapters 4 and 5 describe the effects of temperature on the performance characteristics of MOS and bipolar devices. Chapter 6 discusses using high-temperature stress screens, including burn-in, for high-reliability applications. The burn-in conditions used by some manufacturers are examined and a physics-of-failure approach is described. The.
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PAP. Condition: New. New Book. Shipped from UK. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.
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Seller: Biblios, Frankfurt am main, HESSE, Germany
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Language: English
Published by Taylor & Francis Ltd, 2020
ISBN 10: 0367400979 ISBN 13: 9780367400972
Seller: THE SAINT BOOKSTORE, Southport, United Kingdom
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Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book raises the level of understanding of thermal design criteria. It provides the design team with sufficient knowledge to help them evaluate device architecture trade-offs and the effects of operating temperatures. The author provides readers a sound scientific basis for system operation at realistic steady state temperatures without reliability penalties. Higher temperature performance than is commonly recommended is shown to be cost effective in production for life cycle costs.The microelectronic package considered in the book is assumed to consist of a semiconductor device with first-level interconnects that may be wirebonds, flip-chip, or tape automated bonds; die attach; substrate; substrate attach; case; lid; lid seal; and lead seal. The temperature effects on electrical parameters of both bipolar and MOSFET devices are discussed, and models quantifying the temperature effects on package elements are identified. Temperature-related models have been used to derive derating criteria for determining the maximum and minimum allowable temperature stresses for a given microelectronic package architecture.The first chapter outlines problems with some of the current modeling strategies. The next two chapters present microelectronic device failure mechanisms in terms of their dependence on steady state temperature, temperature cycle, temperature gradient, and rate of change of temperature at the chip and package level. Physics-of-failure based models used to characterize these failure mechanisms are identified and the variabilities in temperature dependence of each of the failure mechanisms are characterized. Chapters 4 and 5 describe the effects of temperature on the performance characteristics of MOS and bipolar devices. Chapter 6 discusses using high-temperature stress screens, including burn-in, for high-reliability applications. The burn-in conditions used by some manufacturers are examined and a physics-of-failure approach is described. The.