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The Physics of Submicron Semiconductor Devices (NATO Science Series B:, 180)
Seller: Zubal-Books, Since 1961, Cleveland, OH, U.S.A.
Seller rating 5 out of 5 stars
£ 30.82
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Add to basketCondition: Very Good. 746 pp., Hardcover, previous owner's name to front free endpaper, some wear to corners else text clean & binding tight. - If you are reading this, this item is actually (physically) in our stock and ready for shipment once ordered. We are not bookjackers. Buyer is responsible for any additional duties, taxes, or fees required by recipient's country.
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Quantum Transport in Ultrasmall Devices
Published by Kluwer Academic/Plenum Publishers, 1995
ISBN 10: 0306449994 ISBN 13: 9780306449994
Language: English
Hardcover. Condition: Comme neuf. Edition 1995. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, As new. Edition 1995. Ammareal gives back up to 15% of this item's net price to charity organizations.
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The Physics of Submicron Semiconductor Devices (Nato Science Series B:)
Seller: Orca Knowledge Systems, Inc., Novato, CA, U.S.A.
Seller rating 4 out of 5 stars
£ 31.05
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Add to basketHardcover. Condition: Very Good. No DJ. Usual library markings. Binding is tight, text clean. Based on a NATO ASI held July 1983 in San Miniato, Italy. Contributions identify key submicron and ultrasubmicron device physics, transport, materials and contact issues. Nonequilibrium and quantum transport, interfacial and size constraints issues are also addressed.
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£ 172.25
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Add to basketCondition: Used. pp. 556 Index.
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Condition: Used. pp. 556 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
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£ 191.51
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Add to basketCondition: Used. pp. 556.
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Quantum Transport in Ultrasmall Devices: Proceedings of a NATO Advanced Study Institute on Quantum Transport in Ultrasmall Devices, held July 17-30, ... Ciocco, Italy (NATO Science Series B:, 342)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
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The Physics of Submicron Semiconductor Devices: (Closed)) (NATO Science Series B:)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
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Quantum Transport in Ultrasmall Devices: Proceedings of a NATO Advanced Study Institute on Quantum Transport in Ultrasmall Devices, held July 17-30, 1994, in II Ciocco, Italy (NATO Science Series B:)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
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The Physics of Submicron Semiconductor Devices (NATO Science Series B:, 180)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
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£ 191.22
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£ 201.10
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Add to basketTaschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is quite complicated and involves many aspects, the device engineering is mostly to devise a 'best' device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 size 10 nm , for a 1Tb memory chip by the year 2020. New problems keep hindering the high-performance requirement. Well-known, but older, problems include hot carrier effects, short-channel effects, etc. A potential problem, which illustrates the need for quantum transport, is caused by impurity fluctuations.
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£ 203.52
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Add to basketGebunden. Condition: New. Proceedings of a NATO ASI held in Il Ciocco, Italy, July 17-30, 1994 The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) an.
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£ 177.41
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£ 177.41
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£ 177.41
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£ 177.59
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£ 252.04
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Add to basketCondition: New. pp. 556 Index.
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Hardcover. Condition: Like New. Like New. book.
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£ 254.98
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Add to basketCondition: New. pp. 748.
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Paperback. Condition: Like New. Like New. book.
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Paperback. Condition: Brand New. reprint edition. 744 pages. 9.26x6.11x1.57 inches. In Stock.
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Quantum Transport in Ultrasmall Devices : Proceedings of a NATO Advanced Study Institute on Quantum Transport in Ultrasmall Devices, Held July 17-30, 1994, in II Ciocco, Italy
Published by Springer Us Jul 1995, 1995
ISBN 10: 0306449994 ISBN 13: 9780306449994
Language: English
£ 284.88
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Add to basketBuch. Condition: Neu. Neuware - The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is quite complicated and involves many aspects, the device engineering is mostly to devise a 'best' device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 size 10 nm , for a 1Tb memory chip by the year 2020. New problems keep hindering the high-performance requirement. Well-known, but older, problems include hot carrier effects, short-channel effects, etc. A potential problem, which illustrates the need for quantum transport, is caused by impurity fluctuations.
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£ 160.92
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Add to basketCondition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The papers contained in the volume represent lectures delivered as a 1983 NATO ASI, held at Urbino, Italy. The lecture series was designed to identify the key submicron and ultrasubmicron device physics, transport, materials and contact issues. Nonequilibri.
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£ 160.92
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Add to basketCondition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Proceedings of a NATO ASI held in Il Ciocco, Italy, July 17-30, 1994 The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) an.
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£ 160.92
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Add to basketGebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The papers contained in the volume represent lectures delivered as a 1983 NATO ASI, held at Urbino, Italy. The lecture series was designed to identify the key submicron and ultrasubmicron device physics, transport, materials and contact issues. Nonequilibri.
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Quantum Transport in Ultrasmall Devices
Published by Springer US, Springer US Okt 2012, 2012
ISBN 10: 1461358094 ISBN 13: 9781461358091
Language: English
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Seller rating 5 out of 5 stars
£ 191.23
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Add to basketTaschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is quite complicated and involves many aspects, the device engineering is mostly to devise a 'best' device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 sizeSpringer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 556 pp. Englisch.
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Quantum Transport in Ultrasmall Devices
Published by Springer US Okt 2012, 2012
ISBN 10: 1461358094 ISBN 13: 9781461358091
Language: English
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germany
Seller rating 5 out of 5 stars
£ 247.66
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Add to basketTaschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The operation of semiconductor devices depends upon the use of electrical potential barriers (such as gate depletion) in controlling the carrier densities (electrons and holes) and their transport. Although a successful device design is quite complicated and involves many aspects, the device engineering is mostly to devise a 'best' device design by defIning optimal device structures and manipulating impurity profIles to obtain optimal control of the carrier flow through the device. This becomes increasingly diffIcult as the device scale becomes smaller and smaller. Since the introduction of integrated circuits, the number of individual transistors on a single chip has doubled approximately every three years. As the number of devices has grown, the critical dimension of the smallest feature, such as a gate length (which is related to the transport length defIning the channel), has consequently declined. The reduction of this design rule proceeds approximately by a factor of 1. 4 each generation, which means we will be using 0. 1-0. 15 ). lm rules for the 4 Gb chips a decade from now. If we continue this extrapolation, current technology will require 30 nm design rules, and a cell 3 2 size 10 nm , for a 1Tb memory chip by the year 2020. New problems keep hindering the high-performance requirement. Well-known, but older, problems include hot carrier effects, short-channel effects, etc. A potential problem, which illustrates the need for quantum transport, is caused by impurity fluctuations. 556 pp. Englisch.
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Condition: New. Print on Demand pp. 556 66:B&W 7 x 10 in or 254 x 178 mm Perfect Bound on White w/Gloss Lam.
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Condition: New. Print on Demand pp. 748 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
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£ 281.78
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Add to basketCondition: New. PRINT ON DEMAND pp. 556.
