Bird Peter Lilja David (31 results)
- Hardcover
Seller: Basi6 International, Irving, TX, U.S.A.Basi6 International
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- Softcover
Seller: Phatpocket Limited, Waltham Abbey, HERTS, United KingdomPhatpocket Limited
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Condition: Good. Your purchase helps support Sri Lankan Children's Charity 'The Rainbow Centre'. Ex-library, so some stamps and wear, but in good overall condition. Our donations to The Rainbow Centre have helped provide an education and a safe haven to hundreds of children who live in appalling conditions.
- Softcover
Seller: Basi6 International, Irving, TX, U.S.A.Basi6 International
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- Hardcover
Seller: Basi6 International, Irving, TX, U.S.A.Basi6 International
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- Softcover
Seller: Ria Christie Collections, Uxbridge, United KingdomRia Christie Collections
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- Hardcover
Seller: Ria Christie Collections, Uxbridge, United KingdomRia Christie Collections
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- Hardcover
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- Hardcover
Seller: GreatBookPrices, Columbia, MD, U.S.A.GreatBookPrices
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- Softcover
Seller: Books Puddle, New York, NY, U.S.A.Books Puddle
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£ 123.86
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Condition: New. pp. 298 Index.
- Hardcover
Seller: Kennys Bookshop and Art Galleries Ltd., Galway, GY, IrelandKennys Bookshop and Art Galleries Ltd.
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£ 118.84
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Condition: New. Demonstrates the importance of integrating contemporary compilation technology with a supporting computer architecture to enhance system performance. This book explores three different aspects of this interaction. It examines the interaction of compiler and the architecture at the instruction level on uniprocesso…rs with multiple function units. Editor(s): Lilja, David J.; Bird, Peter L. Num Pages: 285 pages, biography. BIC Classification: UYF. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 17. Weight in Grams: 1330. . 1994. Hardback. . . . .
- Hardcover
Seller: Books Puddle, New York, NY, U.S.A.Books Puddle
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£ 126.09
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Condition: New. pp. 304 Index.
More images- Softcover
Seller: preigu, Osnabrück, Germanypreigu
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£ 83.87
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Taschenbuch. Condition: Neu. The Interaction of Compilation Technology and Computer Architecture | David J. Lilja (u. a.) | Taschenbuch | viii | Englisch | 2012 | Springer | EAN 9781461361541 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com |… Anbieter: preigu.
- Hardcover
Seller: Kennys Bookstore, Olney, MD, U.S.A.Kennys Bookstore
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£ 144.05
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Condition: New. Demonstrates the importance of integrating contemporary compilation technology with a supporting computer architecture to enhance system performance. This book explores three different aspects of this interaction. It examines the interaction of compiler and the architecture at the instruction level on uniprocesso…rs with multiple function units. Editor(s): Lilja, David J.; Bird, Peter L. Num Pages: 285 pages, biography. BIC Classification: UYF. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 17. Weight in Grams: 1330. . 1994. Hardback. . . . . Books ship from the US and Ireland.
- Softcover
Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
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£ 100.69
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Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for finding register requirements fo…r any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. - We presented an efficient method of estimating register requirements as a function of pipeline depth. - We developed a technique for efficiently finding bounds on register require ments as a function of pipeline depth. - Presented experimental data to verify these new techniques. - discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966.
- Hardcover
Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
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£ 100.69
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Buch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for finding register requirements for any k…ernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. - We presented an efficient method of estimating register requirements as a function of pipeline depth. - We developed a technique for efficiently finding bounds on register require ments as a function of pipeline depth. - Presented experimental data to verify these new techniques. - discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966.
- Softcover
Seller: Mispah books, Redhill, SURRE, United KingdomMispah books
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£ 152.00
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Paperback. Condition: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Hardcover
Seller: GreatBookPricesUK, Woodford Green, United KingdomGreatBookPricesUK
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£ 164.99
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- Hardcover
Seller: Mispah books, Redhill, SURRE, United KingdomMispah books
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£ 157.00
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Hardcover. Condition: Like New. Like New. book.
- Hardcover
Seller: GreatBookPrices, Columbia, MD, U.S.A.GreatBookPrices
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£ 190.23
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Condition: As New. Unread book in perfect condition.
- Softcover
- Print on Demand
Seller: Brook Bookstore On Demand, Napoli, NA, ItalyBrook Bookstore On Demand
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£ 75.93
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Condition: new. Questo è un articolo print on demand.
- Softcover
- Print on Demand
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
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£ 94.20
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for finding register… requirements for any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. - We presented an efficient method of estimating register requirements as a function of pipeline depth. - We developed a technique for efficiently finding bounds on register require ments as a function of pipeline depth. - Presented experimental data to verify these new techniques. - discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966. 296 pp. Englisch.
- Softcover
- Print on Demand
Seller: moluna, Greven, Germanymoluna
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£ 81.24
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for f…inding register requirements for any ker.
- Hardcover
- Print on Demand
Seller: moluna, Greven, Germanymoluna
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£ 81.24
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Gebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was devel…oped for finding register requirements for any ker.
- Softcover
- Print on Demand
Seller: Majestic Books, Hounslow, United KingdomMajestic Books
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£ 127.85
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Condition: New. Print on Demand pp. 298 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
- Hardcover
- Print on Demand
Seller: Majestic Books, Hounslow, United KingdomMajestic Books
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£ 130.02
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Condition: New. Print on Demand pp. 304 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
- Hardcover
- Print on Demand
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
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£ 122.46
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Buch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In brief summary, the following results were presented in this work: - A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. - An algorithm was developed for finding register requir…ements for any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. - We presented an efficient method of estimating register requirements as a function of pipeline depth. - We developed a technique for efficiently finding bounds on register require ments as a function of pipeline depth. - Presented experimental data to verify these new techniques. - discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966. 300 pp. Englisch.
- Softcover
- Print on Demand
Seller: Biblios, frankfurt am main, HESSE, GermanyBiblios
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£ 134.92
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Condition: New. PRINT ON DEMAND pp. 298.
- Hardcover
- Print on Demand
Seller: Biblios, frankfurt am main, HESSE, GermanyBiblios
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£ 135.96
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Condition: New. PRINT ON DEMAND pp. 304.
More images- Hardcover
- Print on Demand
Seller: preigu, Osnabrück, Germanypreigu
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£ 84.26
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Buch. Condition: Neu. The Interaction of Compilation Technology and Computer Architecture | Peter L. Bird (u. a.) | Buch | Einband - fest (Hardcover) | Englisch | 1994 | Springer US | EAN 9780792394518 | Verantwortliche Person für die EU: Springer Heidelberg, Tiergartenstr. 17, 69121 Heidelberg, buchhandel-buch[at]springer[dot]c…om | Anbieter: preigu Print on Demand.
- Softcover
- Print on Demand
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000
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£ 94.20
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In brief summary, the following results were presented in this work: ¿ A linear time approach was developed to find register requirements for any specified CS schedule or filled MRT. ¿ An algorithm was developed for finding register req…uirements for any kernel that has a dependence graph that is acyclic and has no data reuse on machines with depth independent instruction templates. ¿ We presented an efficient method of estimating register requirements as a function of pipeline depth. ¿ We developed a technique for efficiently finding bounds on register require ments as a function of pipeline depth. ¿ Presented experimental data to verify these new techniques. ¿ discussed some interesting design points for register file size on a number of different architectures. REFERENCES [1] Robert P. Colwell, Robert P. Nix, John J O'Donnell, David B Papworth, and Paul K. Rodman. A VLIW Architecture for a Trace Scheduling Com piler. In Architectural Support for Programming Languages and Operating Systems, pages 180-192, 1982. [2] C. Eisenbeis, W. Jalby, and A. Lichnewsky. Compile-Time Optimization of Memory and Register Usage on the Cray-2. In Proceedings of the Second Workshop on Languages and Compilers, Urbana l/inois, August 1989. [3] C. Eisenbeis, William Jalby, and Alain Lichnewsky. Squeezing More CPU Performance Out of a Cray-2 by Vector Block Scheduling. In Proceedings of Supercomputing '88, pages 237-246, 1988. [4] Michael J. Flynn. Very High-Speed Computing Systems. Proceedings of the IEEE, 54:1901-1909, December 1966.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 296 pp. Englisch.
