Bhasin Samridhi (18 results)

Condition: New. pp. 100.

Condition: New.

Taschenbuch. Condition: Neu. Design Of 10-bits Sar Based Analog To Digital Converter | Samridhi Bhasin | Taschenbuch | 108 S. | Englisch | 2014 | LAP LAMBERT Academic Publishing | EAN 9783659588495 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu. …

Taschenbuch. Condition: Neu. Single Port Memory Design Using VHDL | Synthesis and Simulation | Samridhi Bhasin | Taschenbuch | 100 S. | Englisch | 2014 | LAP LAMBERT Academic Publishing | EAN 9783846590607 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.…

paperback. Condition: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

paperback. Condition: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The availability of good analog process in CMOS process has provided promising resulted avenues for the implementation of this topology of converter with good accuracy and low power consumption.The 'Design of SAR based ADC (10 bits)' is an SAR based analog to digital converter using R-2R digital to analog converter. The objective is to assess the development of 10 bit SAR based ADC in 0.35um CMOS process. It consists of design and integration of various blocks of SAR based ADC which comprises of: 10 bits R-2R DAC, Precision Comparator, SAR control logic. The methodology of design is a full custom design using Verilog-Spice.The various blocks of SAR ADC are designed and individually analyzed and tested. First, SAR control logic is designed and simulated and then test bench code for SAR control logic is written to verify the functionality of the design. Then, the digital to Analog Converter is designed and simulated.All the chapters start with the brief explanation. 108 pp. Englisch.…

Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In today's fast paced technology race there are many aspects of a computer that can be improved upon. Memory is an integral part of how a computer works and involves many different complex levels of hierarchy. Semiconductor memory is an electronic data storage device often used as computer memory, implemented on semiconductor-basis integrated circuits. It is made in many different types and technologies. A simple yet efficient method is presented to explore the design space for memory synthesis which deals with single-port memory synthesis according to the design constraints. The application of this method to different synthesis examples is illustrated and demonstrated. With suitable modifications, the technique could be applied to multiport memory synthesis in which the maximum number of read ports is different from the maximum number of write ports. Memory is designed in VHDL to produce the RTL schematic of the desired circuit. After that, the generated schematic can be verified using simulation software which shows the waveforms of inputs and outputs of the circuit after generating the appropriate testbench. All the chapters start with a brief explanation of design stage. 100 pp. Englisch.…

Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - In today's fast paced technology race there are many aspects of a computer that can be improved upon. Memory is an integral part of how a computer works and involves many different complex levels of hierarchy. Semiconductor memory is an electronic data storage device often used as computer memory, implemented on semiconductor-basis integrated circuits. It is made in many different types and technologies. A simple yet efficient method is presented to explore the design space for memory synthesis which deals with single-port memory synthesis according to the design constraints. The application of this method to different synthesis examples is illustrated and demonstrated. With suitable modifications, the technique could be applied to multiport memory synthesis in which the maximum number of read ports is different from the maximum number of write ports. Memory is designed in VHDL to produce the RTL schematic of the desired circuit. After that, the generated schematic can be verified using simulation software which shows the waveforms of inputs and outputs of the circuit after generating the appropriate testbench. All the chapters start with a brief explanation of design stage.…

Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Bhasin SamridhiSamridhi Bhasin graduated from Delhi University,Hansraj College with Bachelor of Science(Hons)in Electronics in 2012.She is pursuing M.Sc.Electronics from Banasthali Vidyapith,Banasthali,doing training in BARC,Mumbai.S.…

Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Bhasin SamridhiSamridhi Bhasin graduated from Delhi University,Hansraj College with Bachelor of Science(Hons)in Electronics in 2012.She has completed M.Sc.Electronics from Banasthali Vidyapith,Banasthali,did training in BARC,Mumbai.S.…

Condition: New. Print on Demand pp. 100 2:B&W 6 x 9 in or 229 x 152 mm Perfect Bound on Creme w/Gloss Lam.

Condition: New. Print on Demand.

Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The availability of good analog process in CMOS process has provided promising resulted avenues for the implementation of this topology of converter with good accuracy and low power consumption.The 'Design of SAR based ADC (10 bits)' is an SAR based analog to digital converter using R-2R digital to analog converter. The objective is to assess the development of 10 bit SAR based ADC in 0.35um CMOS process. It consists of design and integration of various blocks of SAR based ADC which comprises of: 10 bits R-2R DAC, Precision Comparator, SAR control logic. The methodology of design is a full custom design using Verilog-Spice.The various blocks of SAR ADC are designed and individually analyzed and tested. First, SAR control logic is designed and simulated and then test bench code for SAR control logic is written to verify the functionality of the design. Then, the digital to Analog Converter is designed and simulated.All the chapters start with the brief explanation.…

Condition: New. PRINT ON DEMAND.

Condition: New. PRINT ON DEMAND pp. 100.

Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The availability of good analog process in CMOS process has provided promising resulted avenues for the implementation of this topology of converter with good accuracy and low power consumption.The 'Design of SAR based ADC (10 bits)' is an SAR based analog to digital converter using R-2R digital to analog converter. The objective is to assess the development of 10 bit SAR based ADC in 0.35um CMOS process. It consists of design and integration of various blocks of SAR based ADC which comprises of: 10 bits R-2R DAC, Precision Comparator, SAR control logic. The methodology of design is a full custom design using Verilog-Spice.The various blocks of SAR ADC are designed and individually analyzed and tested. First, SAR control logic is designed and simulated and then test bench code for SAR control logic is written to verify the functionality of the design. Then, the digital to Analog Converter is designed and simulated.All the chapters start with the brief explanation.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 108 pp. Englisch.…

Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In today's fast paced technology race there are many aspects of a computer that can be improved upon. Memory is an integral part of how a computer works and involves many different complex levels of hierarchy. Semiconductor memory is an electronic data storage device often used as computer memory, implemented on semiconductor-basis integrated circuits. It is made in many different types and technologies. A simple yet efficient method is presented to explore the design space for memory synthesis which deals with single-port memory synthesis according to the design constraints. The application of this method to different synthesis examples is illustrated and demonstrated. With suitable modifications, the technique could be applied to multiport memory synthesis in which the maximum number of read ports is different from the maximum number of write ports. Memory is designed in VHDL to produce the RTL schematic of the desired circuit. After that, the generated schematic can be verified using simulation software which shows the waveforms of inputs and outputs of the circuit after generating the appropriate testbench. All the chapters start with a brief explanation of design stage.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 100 pp. Englisch.…