Morphological Image Processing Architecture by Jonker P P (8 results)

Condition: New. In.

Condition: New.

Condition: Sehr gut. Zustand: Sehr gut | Seiten: 308 | Sprache: Englisch | Produktart: Bücher | Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real­ time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three.

Taschenbuch. Condition: Neu. Morphological Image Processing: Architecture and VLSI design | P. P. Jonker | Taschenbuch | v | Englisch | 1993 | Springer US | EAN 9789020127669 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.

Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three.

Condition: Fine. The Netherlands 1992. ISBN 90-201-2766-7. Sm.4to., 297pp., wraps. Fine.

Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three. 308 pp. Englisch.

Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. To minimize design pitfalls, a study was performed to the details of the design solutions that have been found in embodimentsof the three main architectural groups of image processing; the Square Processor Arrays, the Linear Processor Arrays and the Pipelines. This is reflected in a theoretical model. As the design is based on bitplane-wise processing of images, research was performed on the principles ofCellularLogic Processing of two dimensional images. of binary A methodology has been developed that is based on the transformation images using sets of Hit-or-Miss masks. This method appeared to be extendable to higher dimensional images. A theoretical model for the generation of break-point conditions in high dimensional images has been developed, and applied up to dimension three.Springer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 308 pp. Englisch.