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Add to basketHardcover. 1990. 160 Seiten Ehem. Bibliotheksexemplar mit üblichen Merkmalen wie Signatur und Stempel. Moderate Lager- und Gebrauchsspuren. Text bis auf selten mögliche Anstreichungen sauber. Insgesamt guter Zustand. Sprache: englisch. Ex library book with stamps and signature. Slight signs of use. Good condition. Language: english. 9780792390589 Sprache: Englisch Gewicht in Gramm: 939.
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Add to basketKluwer, Boston, 1990. X, 159 pages with some graphics, hard cover----former library book in good condition- 460 Gramm.
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Seller: Ria Christie Collections, Uxbridge, United Kingdom
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Add to basketGebunden. Condition: New. Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated .
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Add to basketCondition: New. pp. 176.
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Seller: Mispah books, Redhill, SURRE, United Kingdom
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Published by Springer Us Dez 1989, 1989
ISBN 10: 079239058X ISBN 13: 9780792390589
Language: English
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Add to basketBuch. Condition: Neu. Neuware - Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated circuit technology. It is long been recognized that the testing prob lem can be alleviated by the use of higher-level methods in which multigate modules or cells are the primitive components in test generation; however, the development of such methods has proceeded very slowly. To be acceptable, high-level approaches should be applicable to most types of digital circuits, and should provide fault coverage comparable to that of traditional, low-level methods. The fault coverage problem has, perhaps, been the most intractable, due to continued reliance in the testing industry on the single stuck-line (SSL) fault model, which is tightly bound to the gate level of abstraction. This monograph presents a novel approach to solving the foregoing problem. It is based on the systematic use of multibit vectors rather than single bits to represent logic signals, including fault signals. A circuit is viewed as a collection of high-level components such as adders, multiplexers, and registers, interconnected by n-bit buses. To match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel. However, by reducing the bus size from n to one, we can obtain the traditional gate-level circuit and models.
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Add to basketCondition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated .
Published by Springer-Verlag New York Inc., 2011
ISBN 10: 1461288193 ISBN 13: 9781461288190
Language: English
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Add to basketPaperback / softback. Condition: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 308.
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Add to basketHardback. Condition: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 970.
Seller: Majestic Books, Hounslow, United Kingdom
Condition: New. Print on Demand pp. 176 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
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Add to basketCondition: New. PRINT ON DEMAND pp. 176.