Katevenis Manolis (14 results)
- Hardcover
Seller: ThriftBooks-Dallas, Dallas, TX, U.S.A.ThriftBooks-Dallas
Contact seller5-star sellerCondition: Used - Good
£ 17.90
Free ShippingShips within U.S.A.Quantity: 1 available
Hardcover. Condition: Good. No Jacket. Pages can have notes/highlighting. Spine may show signs of wear. ~ ThriftBooks: Read More, Spend Less.
- Softcover
Seller: Ria Christie Collections, Uxbridge, United KingdomRia Christie Collections
Contact seller5-star sellerCondition: New
£ 50.80
£ 11.98 shippingShips from United Kingdom to U.S.A.Quantity: Over 20 available
Condition: New. In.
- Softcover
Seller: Chiron Media, Wallingford, United KingdomChiron Media
Contact seller5-star sellerCondition: New
£ 47.86
£ 15.49 shippingShips from United Kingdom to U.S.A.Quantity: 10 available
PF. Condition: New.
- Softcover
Seller: Books Puddle, New York, NY, U.S.A.Books Puddle
Contact seller4-star sellerCondition: New
£ 70.83
£ 2.97 shippingShips within U.S.A.Quantity: 4 available
Condition: New. pp. 418.
- Softcover
Seller: Revaluation Books, Exeter, United KingdomRevaluation Books
Contact seller5-star sellerCondition: New
£ 67.76
£ 12.50 shippingShips from United Kingdom to U.S.A.Quantity: 2 available
Paperback. Condition: Brand New. spiral-bound edition. 397 pages. 9.00x6.00x0.75 inches. In Stock.
- Softcover
Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
Contact seller5-star sellerCondition: New
£ 46.82
£ 53.67 shippingShips from Germany to U.S.A.Quantity: 1 available
Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008. The 25 r…evised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized into topical sections on a number of key subjects in the field.
More images- Softcover
Seller: preigu, Osnabrück, Germanypreigu
Contact seller5-star sellerCondition: New
£ 44.12
£ 59.50 shippingShips from Germany to U.S.A.Quantity: 5 available
Taschenbuch. Condition: Neu. High Performance Embedded Architectures and Compilers | Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings | Per Stenström (u. a.) | Taschenbuch | Einband - flex.(Paperback) | Englisch | 2008 | Springer | EAN 9783540775591 | Verantwortliche Person für die…EU: Springer Nature Customer Service Center GmbH, Europaplatz 3, 69115 Heidelberg, productsafety[at]springernature[dot]com | Anbieter: preigu.
- Softcover
Seller: Mispah books, Redhill, SURRE, United KingdomMispah books
Contact seller4-star sellerCondition: Used - As new
£ 99.00
£ 25.00 shippingShips from United Kingdom to U.S.A.Quantity: 1 available
Paperback. Condition: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Softcover
Seller: Buchpark, Trebbin, GermanyBuchpark
Contact seller5-star sellerCondition: Used - Very good
£ 37.92
£ 89.24 shippingShips from Germany to U.S.A.Quantity: 1 available
Condition: Gut. Zustand: Gut | Seiten: 416 | Sprache: Englisch | Produktart: Bücher | This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008. The…25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized into topical sections on a number of key subjects in the field.
- Softcover
- Print on Demand
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
Contact seller5-star sellerCondition: New
£ 46.82
£ 19.55 shippingShips from Germany to U.S.A.Quantity: 2 available
Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29…, 2008. The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized into topical sections on a number of key subjects in the field. 416 pp. Englisch.
- Softcover
- Print on Demand
Seller: Majestic Books, Hounslow, United KingdomMajestic Books
Contact seller4-star sellerCondition: New
£ 70.47
£ 6.50 shippingShips from United Kingdom to U.S.A.Quantity: 4 available
Condition: New. Print on Demand pp. 418 Illus.
- Softcover
- Print on Demand
Seller: Biblios, frankfurt am main, HESSE, GermanyBiblios
Contact seller4-star sellerCondition: New
£ 72.55
£ 8.46 shippingShips from Germany to U.S.A.Quantity: 4 available
Condition: New. PRINT ON DEMAND pp. 418.
High Performance Embedded Architectures and Compilers
Stenström, Per|Dubois, Michel|Katevenis, Manolis|Gupta, Rajiv|Ungerer, Theo
- Softcover
- Print on Demand
Seller: moluna, Greven, Germanymoluna
Contact seller5-star sellerCondition: New
£ 42.34
£ 41.64 shippingShips from Germany to U.S.A.Quantity: Over 20 available
Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Goeteborg, Swede…n, January 27-29, 2008. The 25 revised.
- Softcover
- Print on Demand
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000
Contact seller5-star sellerCondition: New
£ 46.82
£ 51.00 shippingShips from Germany to U.S.A.Quantity: 1 available
Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Invited Program.- Supercomputing for the Future, Supercomputing from the Past (Keynote).- I Multithreaded and Multicore Processors.- MIPS MT: A Multithreaded RISC Architecture for Embedded Real-Time Processing.- rMPI: Message Passing on… Multicore Processors with On-Chip Interconnect.- Modeling Multigrain Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE.- IIa Reconfigurable - ASIP.- BRAM-LUT Tradeoff on a Polymorphic DES Design.- Architecture Enhancements for the ADRES Coarse-Grained Reconfigurable Array.- Implementation of an UWB Impulse-Radio Acquisition and Despreading Algorithm on a Low Power ASIP.- IIb Compiler Optimizations.- Fast Bounds Checking Using Debug Register.- Studying Compiler Optimizations on Superscalar Processors Through Interval Analysis.- An Experimental Environment Validating the Suitability of CLI as an Effective Deployment Format for Embedded Systems.- III Industrial Processors and Application Parallelization.- Compilation Strategies for Reducing Code Size on a VLIW Processor with Variable Length Instructions.- Experiences with Parallelizing a Bio-informatics Program on the Cell BE.- Drug Design Issues on the Cell BE.- IV Power-Aware Techniques.- Coffee: COmpiler Framework for Energy-Aware Exploration.- Integrated CPU Cache Power Management in Multiple Clock Domain Processors.- Variation-Aware Software Techniques for Cache Leakage Reduction Using Value-Dependence of SRAM Leakage Due to Within-Die Process Variation.- V High-Performance Processors.- The Significance of Affectors and Affectees Correlations for Branch Prediction.- Turbo-ROB: A Low Cost Checkpoint/Restore Accelerator.- LPA: A First Approach to the Loop Processor Architecture.- VI Profiles: Collection and Analysis.- Complementing Missing and Inaccurate Profiling Using a Minimum Cost Circulation Algorithm.- Using Dynamic Binary Instrumentation to Generate Multi-platform SimPoints: Methodology and Accuracy.- Phase Complexity Surfaces: Characterizing Time-Varying Program Behavior.- VII Optimizing Memory Performance.- MLP-Aware Dynamic Cache Partitioning.- Compiler Techniques for Reducing Data Cache Miss Rate on a Multithreaded Architecture.- Code Arrangement of Embedded Java Virtual Machine for NAND Flash Memory.- Aggressive Function Inlining: Preventing Loop Blockings in the Instruction Cache.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 416 pp. Englisch.
