Design and Implementation of FPGA based 64 bit MAC Unit

Language: English

Published by LAP LAMBERT Academic Publishing Jul 2017, 2017

3330345993 / 9783330345997

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This item is printed on demand - Print on Demand Titel. Neuware -Nowadays in VLSI, the technology size, power, and speed are the main constraints to design any circuits. In normal multipliers, delay will be more and the number of computations also will be more. Because of that speed of the circuits designed with the normal multipliers will be low and it will consume more power. This book describes Multiply and Accumulate Unit using Vedic Multiplier and DKG reversible logic gates. The Vedic Multiplier is designed by using Urdhava Triyagbhayam sutra and the adder design is done by using reversible logic to perform high speed operations. Reversible logic gates are also the essential constraint for the promising field of Quantum computing. The Urdhava Triyagbhayam multiplier is used for the multiplication function to reduce partial products in the multiplication process and to get high concert and less area. The reversible logic is used to get less power. The MAC is designed using Verilog code, simulation, synthesis is done in both RTL compiler using Xilinx and implemented on Spartan 3e FPGA Board.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 88 pp. Englisch.

Seller Inventory # 9783330345997

Title
Design and Implementation of FPGA based 64 bit MAC Unit
Author
Siva Nagendra Reddy P.
Publisher
LAP LAMBERT Academic Publishing Jul 2017
Publication year
2017
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3330345993
ISBN 13
9783330345997
Item weight
149 grams
Dimensions
220x150x6 mm

buchversandmimpf2000

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