Design, Analysis and Test of Logic Circuits Under Uncertainty
Language: English
Published by Springer Netherlands Sep 2012, 2012
- Hardcover
- New
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
AbeBooks seller since January 11, 2012
Condition: New
£ 94.88
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Add to basketItem description from seller
This item is printed on demand - it takes 3-4 days longer - Neuware -Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits. To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits. The book describes techniques for: Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework; Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations; Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance; Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility. 136 pp. Englisch. …
Seller Inventory # 9789048196432
- Title
- Design, Analysis and Test of Logic Circuits Under Uncertainty
- Author
- Smita Krishnaswamy
- Publisher
- Springer Netherlands Sep 2012
- Publication year
- 2012
- Condition
- Neu
- Binding
- Buch
- Language
- English
- ISBN 10
- 9048196434
- ISBN 13
- 9789048196432
- Item weight
- 377 grams
- Dimensions
- 241x160x13 mm
"Synopsis" may belong to another edition of this title.
From the Back Cover
Integrated circuits (ICs) increasingly exhibit uncertain characteristics due to soft errors, inherently probabilistic devices, and manufacturing variability. As device technologies scale, these effects can be detrimental to the reliability of logic circuits. To improve future semiconductor designs, this book describes methods for analyzing, designing, and testing circuits subject to probabilistic effects. The authors first develop techniques to model inherently probabilistic methods in logic circuits and to test circuits for determining their reliability after they are manufactured. Then, they study error-masking mechanisms intrinsic to digital circuits and show how to leverage them to design more reliable circuits. The book describes techniques for:
• Modeling and reasoning about probabilistic behavior in logic circuits, including a matrix-based reliability-analysis framework;
• Accurate analysis of soft-error rate (SER) based on functional-simulation, sufficiently scalable for use in gate-level optimizations;
• Logic synthesis for greater resilience against soft errors, which improves reliability using moderate overhead in area and performance;
• Test-generation and test-compaction methods aimed at probabilistic faults in logic circuits that facilitate accurate and efficient post-manufacture measurement of soft-error susceptibility.
"About the title" may belong to another edition of this title.
BuchWeltWeit Ludwig Meier e.K.
Bergisch Gladbach, Germany
AbeBooks seller since January 11, 2012
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