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Synopsis
This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
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About the Author
Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal
"About this title" may belong to another edition of this title.
- PublisherCRC Press
- Publication date2017
- ISBN 10 1498783597
- ISBN 13 9781498783590
- BindingHardcover
- LanguageEnglish
- Edition number1
- Number of pages154
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Brajesh Kumar Kaushik received Ph.D. degree in 2007 from Indian Institute of Technology Roorkee, India. He served Vinytics Peripherals Pvt. Ltd., Delhi, as Research and Development Engineer in microprocessor, microcontroller, and DSP (Di. Seller Inventory # 869724880
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