The Verilog® Hardware Description Language - Softcover

Thomas, Donald E.; Moorby, Philip R.

Softcover

ISBN 10: 147577589X ISBN 13: 9781475775891

Publisher: Springer, 2014

Synopsis

xv From the Old to the New xvii Acknowledgments xxi 1 Verilog – A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("

About this title

From the Back Cover

Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog.
The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered ensure its quick use in design.
The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included.

Edition details

• Publisher: Springer
• Publication date: 2014
• Language: English
• ISBN 10: 147577589X
• ISBN 13: 9781475775891
• Binding: Paperback
• Number of pages: 404