This is a revised edition of a standard text, which presents the language through examples illustrating the important styles of representation, including: structural models, behavioural models of combinational and sequential circuits for logic synthesis, FSM-datapath models, and cycle-accurate descriptions. A chapter on behavioural synthesis presents the use of cycle-accurate descriptions with these tools. This text can be used as a useful resource for engineers and students interested in describing, simulating, and synthesizing digital systems. The order of coverage of representation styles matches typical introductory courses (structural, synthesizable, FSM-datapath, cycle-accurate). An appendix with a tutorial workbook style is keyed into the introduction. For architecture courses, modelling of simple pipelined processors is presented. The pack includes a CD-ROM containing the VeriwellTM Verilog simulator, the Synplicity TM Synplify TM FPGA synthesis software, examples from the book in text and PDF format, and lecture slides in PDF format. Usage of the synthesis tool is time-limited; directions for obtaining an extended licence are provided. The simulator and synthesis tools are available for several platforms.
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Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog.
The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered ensure its quick use in design.
The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included.
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