Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems - Hardcover

Zaccaria, Vittorio; Sami, M.G.; Sciuto, Donatella; Silvano, Cristina

 
9781402073779: Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems

Synopsis

This text discusses the introduction of innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance Very Long Instruction Word (VLIW) microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations; this set of operations is statically scheduled to form a Very Long Instruction Word. The proposed estimation techniques are integrated into a set of tools operating at the instruction level and they are characterized by efficiency and accuracy. The aim is the definition of an overall power estimation framework, from a system-level perspective, where novel power optimization techniques can be evaluated. The proposed power optimization techniques are addressed to the micro-architectural as well as the system level. Two main optimization techniques have been proposed: the definition of register file write inhibition schemes that exploit the forwarding paths, and the definition of a design exploration framework for an efficient fine-tuning of the configurable modules of an embedded system.

"synopsis" may belong to another edition of this title.

Synopsis

The main contribution of "Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems" consists of the introduction of innovative power estimation and optimization methodologies to support the design of low power embedded systems based on high-performance Very Long Instruction Word (VLIW) microprocessors. A VLIW processor is a (generally) pipelined processor that can execute, in each clock cycle, a set of explicitly parallel operations; this set of operations is statically scheduled to form a Very Long Instruction Word. The proposed estimation techniques are integrated into a set of tools operating at the instruction level and they are characterized by efficiency and accuracy. The aim is the definition of an overall power estimation framework, from a system-level perspective, where novel power optimization techniques can be evaluated. The proposed power optimization techniques are addressed to the micro-architectural as well as the system level.

Two main optimization techniques have been proposed: the definition of register file write inhibition schemes that exploit the forwarding paths, and the definition of a design exploration framework for an efficient fine-tuning of the configurable modules of an embedded system.

"About this title" may belong to another edition of this title.

Other Popular Editions of the Same Title

9781441953391: Power Estimation and Optimization Methodologies for VLIW-based Embedded Systems

Featured Edition

ISBN 10:  1441953396 ISBN 13:  9781441953391
Publisher: Springer, 2011
Softcover