According to market analysts, the market for consumer electronics will con tinue to grow at a rate higher than that of electronic systems in general. The consumer market can be characterized by rapidly growing complexities of appli cations and a rather short market window. As a result, more and more complex designs have to be completed in shrinking time frames. A key concept for coping with such stringent requirements is re-use. Since the re-use of completely fixed large hardware blocks is limited to subproblems of system-level applications (for example MPEG-2), flexible, programmable pro cessors are being used as building blocks for more and more designs. Processors provide a unique combination offeatures: they provide flexibility and re-use. The processors used in consumer electronics are, however, in many cases dif ferent from those that are used for screen and keyboard-based equipment, such as PCs. For the consumer market in particular, efficiency of the product plays a dominating role. Hence, processor architectures for these applications are usually highly-optimized and tailored towards a certain application domain.
The market for consumer electronics is characterized by rapidly growing complexities of applications and decreasing market window opportunities. A key concept for coping with such requirements is the reuse of system components. Embedding programmable processors into VLSI systems facilitates reuse and offers a high degree of flexibility. The use of embedded processors, however, poses challenges for software compilers, because real-time constraints and limited silicon area for program memories demand extremely efficient machine code. Additionally there is a need for flexible, retargetable compilers which explore the mutual dependence between processor architectures and program execution speed. Current compiler technology does not meet these demands, particularly the area of DSP where application-specific processors are predominant. As a consequence, the largest part of DSP software is still developed manually at assembly language level.Recent research efforts, located at the intersection of software and hardware design, aim at eliminating this bottleneck.
"Retargetable Code Generation for Digital Signal Processors" outlines the new role of compilers in hardware/software codesign of embedded systems, and it describes the state-of-the-art in the area of retargetable code generation and optimization for embedded DSPs. It presents novel concepts and algorithmic solutions, which achieve both retargetability and high code quality. In contrast to approaches taken in classical compiler construction, emphasis is put on effective code optimization instead of high compilation speed. The usefulness of the proposed techniques is demonstrated for real-life architectures. "Retargetable Code Generation for Digital Signal Processors", with a foreword by Peter Marwedel, is the first contribution to this area, that presents an integrated solution for retargetable DSP compilers.It covers the whole compilation process, including target processor modelling, intermediate code generation, code selection, register allocation, scheduling and optimization for parallelism. It will be of interest to researchers, senior design engineers and CAD managers both in academia and industry.
