Morphological Image Processing: Architecture and VLSI design (Paperback)
P.P. Jonker
Sold by Grand Eagle Retail, Bensenville, IL, U.S.A.
AbeBooks Seller since 12 October 2005
New - Soft cover
Condition: New
Quantity: 1 available
Add to basketSold by Grand Eagle Retail, Bensenville, IL, U.S.A.
AbeBooks Seller since 12 October 2005
Condition: New
Quantity: 1 available
Add to basketPaperback. This text describes image processing research based on the morphology of the objects in an image and a VLSI design of a cellular logic processing element for a real-time processor pipeline. The field of image processing has spawned a number of special parallel computer architectures: the Square (SIMD), Processor Array, the Pyramid, the Linear Processor Array (or scan line array) and the Processor Pipeline. This book features a classification of low-level image processing operations, reviews some intermediate level algorithms, and gives a short introduction into computer architecture used for image and digital signal processing. Morphology-based processing images is introduced by treating cellular logic operations such as skeletonization as hit-or-miss transformations. This approach can be extended to images of higher dimensions than two and a method is described to construct hit-or-miss masks for the skeletonization of these images. In the second part of the book a study is performed on the speed bottlenecks that can be found in the main architectural groups followed by the description of a method for the structured design of integrated, digital hardware.The VLSI design of a CMOS Processing Element for the real-time processing of binary images and the board level design of a scalable processor pipeline for a real-time low-level processing of grey value images is described in detail. Finally, a computer architecture for low and intermediate processing of two and three dimensional images if proposed. Summary Based on the experiences of past designs and the outcome of recent studies in the comparisons of low-level image processing architectures, a pipelined system for real time low-image processing has been designed and realized in CMOS technology. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.
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