Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications (Paperback)

Takayasu Sakurai

ISBN 10: 1441939776 / ISBN 13: 9781441939777

Published by Springer-Verlag New York Inc., New York, NY, 2010

Paperback. 5. 2 RF Building Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 5. 2. 1 Piezoelectric Oscillators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 5. 2. 2 Voltage Reference Generator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 5. 2. 3 Transmit/Receive Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224 5. 2. 4 Low-Noise Amplifiers (LNAs). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226 5. 2. 5 Power Amplifiers (PAs). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228 5. 2. 6 Mixers and Image-Rejection Receiver . . . . . . . . . . . . . . . . . . . . . . . . 230 5. 2. 7 Voltage-Controlled Oscillator (VCO). . . . . . . . . . . . . . . . . . . . . . . . . . 242 5. 2. 8 Limiting Amplifiers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248 5. 2. 9 gm-C Filters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 5. 3 A/D and D/A Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254 5. 3. 1 Cyclic A/D Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255 5. 3. 2 Sigma-Delta A/D Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264 5. 3. 3 Current-Steering D/A Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270 5. 4 DC-DC Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276 5. 4. 1 Design of DC-DC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276 5. 4. 2 Switched-Capacitor (SC)-Type Converter. . . . . . . . . . . . . . . . . . . 276 5. 4. 3 Buck Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279 5. 4. 4 Applicable Zones for SC-Type and Buck Converters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283 5. 4. 5 On-chip Distributed Power Supplies for Ultralow-Power LSIs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285 5. 5 I/O and ESD-Protection Circuitry for Ultralow-Power LSIs . . 291 5. 5. 1 Standard Interface Trends. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291 5. 5. 2 Problems with I/O Circuits for 0. 5-V/3. 3-V Conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292 5. 5. 3 Guidelines for Design of Interface Circuits. . . . . . . . . . . . . . . . . 293 5. 5. 4 Performance of I/O Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297 5. 5. 5 ESD Protection with FD-SOI Devices . . . . . . . . . . . . . . . . . . . . . . . . 298 5. 5. 6 Design and Layout Requirements for ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 5. 6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304 viii Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability. Seller Inventory # 9781441939777

Synopsis:

The most important issue confronting CMOS technology is the power explosion of chips arising from the scaling law. Fully-depleted (FD) SOI technology provides a promising low-power solution to chip implementation. Ultralow-power VLSIs, which have a power consumption of less than 10 mW, will be key components of terminals in the coming ubiquitous-IT society. Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding.

About the Author:

Takayasu Sakurai received the Ph.D degree in Electronic Engineering from University of Tokyo, Japan, in 1981 and he joined Toshiba Corporation, where he designed CMOS DRAM, SRAM, BiCMOS ASIC's, RISC's, and multimedia VLSI's. He worked on simple yet accurate interconnect delay, capacitance and MOS models widely used as alpha power-law MOS model. He proposed to sense-amplifying flip-flops, variable threshold voltage CMOS scheme, dual voltage converter scheme, hot carrier resilient circuits and other numerous digital and memory circuits, which are adopted in current high-performance, low-power VLSI's. He was a visiting researcher at University of California, Berkeley from 1988 to 1990. In 1996, he moved to University of Tokyo and is consulting to US startup companies. He has published about 250 technical publications including more than 30 invited papers and 6 books and filed about 100 patents. He is a recipient of four product awards and two design contest awards. He served as a conference chair for the Symposium on VLSI Circuits, and a technical program committee member for ISSCC, CICC, DAC, ICCAD, FPGA workshop, ISLPED, ASPDAC, TAU, and other international conferences. He is a keynote speaker for the 2003 ISSCC. He is an IEEE Fellow, an elected Administration Committee member for the IEEE Solid-State Circuits Society and an IEEE CAS distinguished lecturer.

Bibliographic Details

Title: Fully-Depleted SOI CMOS Circuits and ...
Publisher: Springer-Verlag New York Inc., New York, NY
Publication Date: 2010
Binding: Paperback
Condition: new
Edition: 1st Edition