Language: English
Published by LAP LAMBERT Academic Publishing, 2011
ISBN 10: 3838334124 ISBN 13: 9783838334127
Seller: moluna, Greven, Germany
Condition: New.
Language: English
Published by LAP LAMBERT Academic Publishing, 2011
ISBN 10: 3838334124 ISBN 13: 9783838334127
Seller: Mispah books, Redhill, SURRE, United Kingdom
Paperback. Condition: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
Language: English
Published by LAP LAMBERT Academic Publishing Feb 2011, 2011
ISBN 10: 3838334124 ISBN 13: 9783838334127
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germany
Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -On high-performance embedded computing, we are witnessing the trend to integrate multiple cores in Multi-Processor Systems-on-Chip (MPSoCs). Networks- on-chip (NoCs) have been proposed to be a scalable, predictable and flexible paradigm to design complex NoC-based Many-core MPSoCs. However, since the number of cores increases exponentially, new challenges such as the design of suitable NoCs, and how to exploit parallelism on a chip arise. In this book, we showour EDA tool (xENoC - NoCMaker) that allows design, simulation and fast-prototype of NoC-based systems, as well as the trade-offs on the design of Network Interfaces (NI) to provide interoperability between cores of different protocols (AMBA/OCP-IP) with Quality-of-Service (QoS) support at a reasonable power and area costs. In the second part, the book tries to shed light on system-level software, runtime QoS support and middleware APIs, and a MPI-like parallel programming model (ocMPI), which offers SW programmers a way to express message-passing parallelism on NoC-based MPSoCs. This book should be especially useful for researchers on the field of parallel embedded computing on many- core on-chip systems. 228 pp. Englisch.
Language: English
Published by LAP LAMBERT Academic Publishing, 2011
ISBN 10: 3838334124 ISBN 13: 9783838334127
Seller: preigu, Osnabrück, Germany
Taschenbuch. Condition: Neu. System-Level Software and Architectural Support for NoC-based MPSoCs | A HW-SW Component View for Many-core Systems | Jaume Joven (u. a.) | Taschenbuch | 228 S. | Englisch | 2011 | LAP LAMBERT Academic Publishing | EAN 9783838334127 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu Print on Demand.
Language: English
Published by LAP LAMBERT Academic Publishing Feb 2011, 2011
ISBN 10: 3838334124 ISBN 13: 9783838334127
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -On high-performance embedded computing, we are witnessing the trend to integrate multiple cores in Multi-Processor Systems-on-Chip (MPSoCs). Networks- on-chip (NoCs) have been proposed to be a scalable, predictable and flexible paradigm to design complex NoC-based Many-core MPSoCs. However, since the number of cores increases exponentially, new challenges such as the design of suitable NoCs, and how to exploit parallelism on a chip arise. In this book, we showour EDA tool (xENoC - NoCMaker) that allows design, simulation and fast-prototype of NoC-based systems, as well as the trade-offs on the design of Network Interfaces (NI) to provide interoperability between cores of different protocols (AMBA/OCP-IP) with Quality-of-Service (QoS) support at a reasonable power and area costs. In the second part, the book tries to shed light on system-level software, runtime QoS support and middleware APIs, and a MPI-like parallel programming model (ocMPI), which offers SW programmers a way to express message-passing parallelism on NoC-based MPSoCs. This book should be especially useful for researchers on the field of parallel embedded computing on many- core on-chip systems.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 228 pp. Englisch.