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Add to basketBuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - The size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore, today's design ow has to be improved to achieve a higher productivity. In this book the current design methodology and ver- cation methodology are analyzed, a number of de ciencies are identi ed, and solutions are suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major - sign problems are targeted. In particular, a complete tool ow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Veri cation issues are covered in even more detail. A whole new paradigm for formal design veri cation is suggested. This is based upon design und- standing, the automatic generation of properties, and powerful tool support for debugging failures. All these new techniques are empirically evaluated and - perimental results are provided. As a result, an enhanced design ow is created that provides more automation (i.e. better usability) and reduces the probability of introducing conceptual errors (i.e. higher robustness). Acknowledgments We would like to thank all members of the research group for computer arc- tecture in Bremen for the helpful discussions and the great atmosphere during work and research.
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Published by Springer Netherlands, 2010
ISBN 10: 904817662X ISBN 13: 9789048176625
Language: English
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Add to basketCondition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. More automation for time consuming tasksPowerful tools by exploiting formal techniquesVisionary approach for formal design verificationDebugging at the source level becomes easyRobustness against error prone manual interventio.
Published by SPRINGER NATURE Jan 2008, 2008
ISBN 10: 1402065353 ISBN 13: 9781402065354
Language: English
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Add to basketBuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The size of technically producible integrated circuits increases continuously, but the ability to design and verify these circuits does not keep up. Therefore today's design flow has to be improved. Using a visionary approach, this book analyzes the current design methodology and verification methodology, a number of deficiencies are identified and solutions suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. 166 pp. Englisch.
Published by Springer Netherlands, 2008
ISBN 10: 1402065353 ISBN 13: 9781402065354
Language: English
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Add to basketGebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. More automation for time consuming tasksPowerful tools by exploiting formal techniquesVisionary approach for formal design verificationDebugging at the source level becomes easyRobustness against error prone manual interventio.
Published by Springer-Verlag New York Inc., 2008
ISBN 10: 1402065353 ISBN 13: 9781402065354
Language: English
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Add to basketHardback. Condition: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 1010.