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Processor Architecture Dataflow Superscalar by Silc Jurij (8 results)
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Paperback. Condition: Good. No Jacket. Pages can have notes/highlighting. Spine may show signs of wear. ~ ThriftBooks: Read More, Spend Less.
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Processor Architecture: From Dataflow to Superscalar and Beyond
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
£ 81.52
£ 11.98 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
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PF. Condition: New.
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paperback. Condition: New. In shrink wrap. Looks like an interesting title!
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Paperback. Condition: Brand New. 1st edition. 389 pages. German language. 9.00x6.00x1.00 inches. In Stock.
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Taschenbuch. Condition: Neu. Processor Architecture | From Dataflow to Superscalar and Beyond | Jurij Silc (u. a.) | Taschenbuch | xxii | Englisch | 1999 | Springer | EAN 9783540647980 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
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Processor Architecture : From Dataflow to Superscalar and Beyond
Language: English
Published by Springer, Springer Berlin Heidelberg, 1999
ISBN 10: 3540647988 ISBN 13: 9783540647980
Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - Today's microprocessors are the powerful descendants of the von Neumann 1 computer dating back to a memo of Burks, Goldstine, and von Neumann of 1946. The so-called von Neumann architecture is characterized by a se quential control flow resulting in a sequential instruction stream. A program counter addresses the next instruction if the preceding instruction is not a control instruction such as, e. g. , jump, branch, subprogram call or return. An instruction is coded in an instruction format of fixed or variable length, where the opcode is followed by one or more operands that can be data, addresses of data, or the address of an instruction in the case of a control instruction. The opcode defines the types of operands. Code and data are stored in a common storage that is linear, addressed in units of memory words (bytes, words, etc. ). The overwhelming design criterion of the von Neumann computer was the minimization of hardware and especially of storage. The most simple implementation of a von Neumann computer is characterized by a microar chitecture that defines a closely coupled control and arithmetic logic unit (ALU), a storage unit, and an I/O unit, all connected by a single connection unit. The instruction fetch by the control unit alternates with operand fetches and result stores for the AL U.
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Paperback. Condition: Like New. Like New. book.
