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Computer Architecture Techniques Power Efficiency by Kaxiras Stefanos (9 results)
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Computer Architecture Techniques for Power-Efficiency (Synthesis Lectures on Computer Architecture)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
£ 35.19
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Add to basketCondition: New. In English.
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Add to basketPaperback. Condition: New.
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Condition: New. 1st edition NO-PA16APR2015-KAP.
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Taschenbuch. Condition: Neu. Computer Architecture Techniques for Power-Efficiency | Stefanos Kaxiras (u. a.) | Taschenbuch | Synthesis Lectures on Computer Architecture | xi | Englisch | 2008 | Springer | EAN 9783031005930 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
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Condition: new. Questo è un articolo print on demand.
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Condition: New. Print on Demand.
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Condition: New. PRINT ON DEMAND.
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Computer Architecture Techniques for Power-Efficiency
Language: English
Published by Springer, Berlin|Springer International Publishing|Morgan & Claypool|Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating fre.
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Computer Architecture Techniques for Power-Efficiency
Language: English
Published by Springer, Springer Jun 2008, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / ConclusionsSpringer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 220 pp. Englisch.
