9783319594170 - Asic/soc Functional Design Verification: a Comprehensive Guide to Technologies and Methodologies by Mehta, Ashok B (13 results)

Condition: New. In English.

Hardcover. Condition: new. Hardcover. This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, ReuseMethodology from Algorithm/ESL to RTL, and other overall methodologies. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.

Condition: New. pp. 239.

Buch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, ReuseMethodology from Algorithm/ESL to RTL, and other overall methodologies.

Hardcover. Condition: Brand New. com edition. 360 pages. 9.25x6.10x0.98 inches. In Stock.

Hardcover. Condition: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

Hardcover. Condition: new. Hardcover. This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, ReuseMethodology from Algorithm/ESL to RTL, and other overall methodologies. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.

Hardcover. Condition: Brand New. com edition. 360 pages. 9.25x6.10x0.98 inches. In Stock. This item is printed on demand.

Gebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides readers with a single-source guide to the entire domain of functional design verificationDescribe many industry standard tools available in the market so readers know which tools to pursue to their greatest advantageIncludes.

Buch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, ReuseMethodology from Algorithm/ESL to RTL, and other overall methodologies. 360 pp. Englisch.

Buch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, ReuseMethodology from Algorithm/ESL to RTL, and other overall methodologies.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 360 pp. Englisch.

Condition: New. Print on Demand pp. 239.

Condition: New. PRINT ON DEMAND pp. 239.