Jens Lienig

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VLSI Physical Design: From Graph Partitioning to Timing Closure
Kahng, Andrew B.; Lienig, Jens; Markov, Igor L.; Hu, Jin

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� 45.10

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Fundamentals of Electronic Systems Design
Lienig, Jens; Bruemmer, Hans

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� 51.57

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Fundamentals of Layout Design for Electronic Circuits
Lienig, Jens; Scheible, Juergen

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� 79.18

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VLSI Physical Design: From Graph Partitioning to Timing Closure
Kahng, Andrew B.; Lienig, Jens; Markov, Igor L.

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� 73.05

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Fundamentals of Electromigration-Aware Integrated Circuit Design
Lienig, Jens; Rothe, Susann; Thiele, Matthias

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� 97.64

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Layoutsynthese Elektronischer Schaltungen - Grundlegende Algorithmen Fur Die Entwurfsautomatisierung
Lienig, Jens

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� 20.38

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Elektronische Ger�tetechnik: Grundlagen f�r das Entwickeln elektronischer Baugruppen und Ger�te
Lienig, Jens; Br�mmer, Hans

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� 28.68

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Layoutsynthese elektronischer Schaltungen: Grundlegende Algorithmen f�r die Entwurfsautomatisierung
Lienig, Jens

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� 31.99

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