VHDL for Simulation, Synthesis and Formal Proofs of Hardware

Language: English

Published by Kluwer Academic Publishers, 1992

0792392531 / 9780792392538

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Presents recent research on four key issues related to the use of VHDL as a standard for hardware description: simulation of circuits using VHDL; the combination of synthesis and VHDL in designing circuits; the formal verification of VHDL designs; and modelling issues and system level design. Editor(s): Mermet, Jean. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 307 pages, biography. BIC Classification: TJFC; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 19. Weight in Grams: 1380. . 1992. Hardback. . . . .

Seller Inventory # V9780792392538

Title
VHDL for Simulation, Synthesis and Formal Proofs of Hardware
Author
. Ed(s): Mermet, Jean
Publisher
Kluwer Academic Publishers
Publication year
1992
Condition
New
Binding
Hardcover
Language
English
ISBN 10
0792392531
ISBN 13
9780792392538

Kennys Bookshop and Art Galleries Ltd.

Galway, GY, Ireland

5-star seller

AbeBooks seller since February 27, 2001

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Kennys.ie is the largest exporter of books from Ireland currently exporting to approximately 100 countries around the world. Kennys Bookshop houses hundreds of thousands of books and specialises in collection development and library services, supplying booksellers and state and university libraries on a global scale including the U.S.A.,Japan and Europe. Kennys.ie is Ireland's Largest Online Bookshop.

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