Universal Verification Methodology Based Verification Environment

Language: English

Published by LAP LAMBERT Academic Publishing Jan 2014, 2014

3659476048 / 9783659476044

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Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000

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Softcover

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This item is printed on demand - Print on Demand Titel. Neuware -Ever increasing silicon design complexity and transistor density, product differentiation and time to market are major factors creating huge pressure on complete design flow. This book covers Verification phase by describing the concepts of Universal Verification Methodology (UVM) and by presenting a pragmatic approach of developing efficient and unified advanced verification environment at all levels using Universal Verification Methodology along with Assertion based verification, hardware acceleration and Transaction Level Modeling. This book is written primarily for verification engineers performing verification of complex IP blocks or entire system-on-chip (SoC) designs. However, much of material will also be of interest to SoC project managers as well as designers to learn more about verification. Furthermore, this book includes detailed information about verification environment for one case which can be easily used as reference for other cases.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 140 pp. Englisch.…

Seller Inventory # 9783659476044

Title
Universal Verification Methodology Based Verification Environment
Author
Abhishek Jain
Publisher
LAP LAMBERT Academic Publishing Jan 2014
Publication year
2014
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3659476048
ISBN 13
9783659476044
Item weight
227 grams
Dimensions
220x150x9 mm

buchversandmimpf2000

Emtmannsberg, BAYE, Germany

5-star seller

AbeBooks seller since January 23, 2017

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Impressum Thorsten Retsch Buchversand Mimpf2000 Oberölschnitz 16 95517 Emtmannsberg Deutschland Telefon: 09209-2023188 Email: mimpf2000@online.de USt-ID-Nr.: DE 235096871 Wir führen gebrauchte Bücher aus allen Sparten der Literatur

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