Time-interleaved Analog-to-Digital Converters

Simon Louwsma

ISBN 10: 9400799519 / ISBN 13: 9789400799516

Published by Springer Netherlands, Springer Netherlands Dez 2014, 2014

About this Item

Neuware -Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration.The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature.Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 152 pp. Englisch.

Seller Inventory # 9789400799516

Bibliographic Details

• Title: Time-interleaved Analog-to-Digital Converters
• Publisher: Springer Netherlands, Springer Netherlands Dez 2014
• Publication Date: 2014
• Language: English
• ISBN 10: 9400799519
• ISBN 13: 9789400799516
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 9D millimeters 235 millimeters width by 155 millimeters height by 9 millimeters depth
• Weight: 242 grams

About this title

Synopsis

Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration.

The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature.

Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step.