Title: Switch-Level Timing Simulation of MOS VLSI Circuits (The Springer International Series in Engineering and Computer Science, 66)
Publisher: Springer
Publication Date: 1988
Language: English
ISBN 10: 0898383021
ISBN 13: 9780898383027
Binding: Hardcover
Condition: New

About this title

Synopsis

Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com� puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.

Synopsis

Based on two doctoral dissertations. Presents algorithms for the accurate estimation of analog waveforms in digital MOS circuits. Timing information obtained from these waveform estimates can be computed at least two orders of magnitude faster than by means of circuit simulation and the accuracy of the estimates is typically within 10% of the circu

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