Power-Aware Testing and Test Strategies for Low Power Devices

Patrick Girard

ISBN 10: 1489983139 / ISBN 13: 9781489983138

Published by Springer US, Springer New York, 2014

About this Item

Druck auf Anfrage Neuware - Printed after ordering - Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and EDA solutions for testing low power devices.

Seller Inventory # 9781489983138

Bibliographic Details

• Title: Power-Aware Testing and Test Strategies for Low Power Devices
• Publisher: Springer US, Springer New York
• Publication Date: 2014
• Language: English
• ISBN 10: 1489983139
• ISBN 13: 9781489983138
• Binding: Taschenbuch
• Condition: Neu
• Dimensions: 235W x 155H x 21D millimeters 235 millimeters width by 155 millimeters height by 21 millimeters depth
• Weight: 587 grams

About this title

Synopsis

Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and EDA solutions for testing low power devices.

From the Back Cover

Power-Aware Testing and Test Strategies for Low-Power Devices

Edited by:

Patrick Girard, Research Director, CNRS / LIRMM, France

Nicola Nicolici, Associate Professor, McMaster University, Canada

Xiaoqing Wen, Professor, Kyushu Institute of Technology, Japan

Managing the power consumption of circuits and systems is now considered as one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low-power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and Electronic Design Automation (EDA) solutions for testing low-power devices.

1. The first comprehensive book on power-aware test for (low-power) circuits and systems
2. Shows readers how low-power devices can be tested safely without affecting yield and reliability
3. Includes necessary background information on design-for-test and low-power design
4. Covers in detail power-constrained test techniques, including power-aware automatic test pattern generation, design-for-test, built-in self-test and test compression
5. Presents state-of-the-art industrial practices and EDA solutions