Title: Performance et analyse de l'ex�cution hors ordre des t�ches dans les MPSoCs (French Edition)
Publisher: Editions Notre Savoir
Publication Date: 2024
Language: French
ISBN 10: 6208353823
ISBN 13: 9786208353827
Binding: Soft cover
Condition: New

About this title

Synopsis

La structure de communication inter-sous-syst�mes peut �tre optimis�e au d�but du processus de conception en utilisant des mod�les de simulation � trois niveaux d'abstraction diff�rents. Cette m�thode d'exploration permet d'�viter certains cas de boucles de conception. Avec l'�tude de cas Motion-JPEG, nous illustrons l'ensemble du processus d'exploration de la communication �tape par �tape. Les r�sultats exp�rimentaux montrent que, par rapport � la simulation pr�cise du cycle, la communication inter-syst�mes peut �tre bien optimis�e et �valu�e � des niveaux d'abstraction plus �lev�s. Dans ce projet, une solution pour un probl�me de classification est utilis�e pour optimiser l'affectation des paquets � diff�rents chemins de donn�es au sein d'un syst�me sur puce (SoC) de processeur de r�seau. Sur la base d'une sp�cification du cas d'utilisation de notre classificateur, il d�rive l'algorithme de graphe de d�cision h�t�rog�ne (HDGA), une approche heuristique pour construire un classificateur d'arbre de d�cision qui int�gre des r�sultats de recherche externes pour certains types de r�gles. �valuation de divers param�tres pour optimiser l'arbre de d�cision propos� et pr�sentation de r�sultats de simulation pour montrer l'�volutivit� de l'HDGA pour des tailles de probl�mes typiques. Ce projet se termine par les r�sultats d'une impl�mentation sur notre plateforme FPGA.

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