An Open-Source Research Platform for Heterogeneous Systems on Chip

Name: An Open-Source Research Platform for Heterogeneous Systems on Chip
Author: Kurth, Andreas Dominic
ISBN: 9783866287747

Kurth, Andreas Dominic

Language: English

Published by Hartung-Gorre, Wolfgang, 2022

3866287747 / 9783866287747

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Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. &Uumlber den AutorrnrnAndreas Kurth was born in Switzerland in 1990. He received his MSc degree in electrical engineering and information technology from ETH Zurich in 2017. He then joined the group of Prof. Dr. Luca Benini at the Integrated Sy.

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Title: An Open-Source Research Platform for Heterogeneous Systems on Chip
Author: Kurth, Andreas Dominic
Publisher: Hartung-Gorre, Wolfgang
Publication year: 2022
Condition: New
Binding: Soft cover
Language: English
ISBN 10: 3866287747
ISBN 13: 9783866287747
Seller catalogs: Mathematik/Naturwissenschaften/Technik/Medizin

Heterogeneous systems on chip (HeSoCs) combine general-purpose, feature-rich multi-core host processors with domain-specific programmable many-core accelerators (PMCAs) to unite versatility with energy efficiency and peak performance. By virtue of their heterogeneity, HeSoCs hold the promise of increasing performance and energy efficiency compared to homogeneous multiprocessors, because applications can be executed on hardware that is designed for them. However, this heterogeneity also increases system complexity substantially. This thesis presents the first research platform for HeSoCs where all components, from accelerator cores to application programming interface, are available under permissive open-source licenses. We begin by identifying the hardware and software components that are required in HeSoCs and by designing a representative hardware and software architecture. We then design, implement, and evaluate four critical HeSoC components that have not been discussed in research at the level required for an open-source implementation: First, we present a modular, topology-agnostic, high-performance on-chip communication platform, which adheres to a state-of-the-art industry-standard protocol. We show that the platform can be used to build high-bandwidth (e.g., 2.5 GHz and 1024 bit data width) end-to-end communication fabrics with high degrees of concurrency (e.g., up to 256 independent concurrent transactions). Second, we present a modular and efficient solution for implementing atomic memory operations in highly-scalable many-core processors, which demonstrates near-optimal linear throughput scaling for various synthetic and real-world workloads and requires only 0.5 kGE per core. Third, we present a hardware-software solution for shared virtual memory that avoids the majority of translation lookaside buffer misses with prefetching, supports parallel burst transfers without additional buffers, and can be scaled with the workload and number of parallel proces

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