The Next Era in Hardware Security
Rangarajan, Nikhil|Patnaik, Satwik|Knechtel, Johann|Rakheja, Shaloo|Sinanoglu, Ozgur
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Add to basketDieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. This book provides a comprehensive coverage of hardware security concepts, derived from the unique characteristics of emerging logic and memory devices and related architectures. The primary focus is on mapping device-specific properties, such as multi-f.
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This book provides a comprehensive coverage of hardware security concepts, derived from the unique characteristics of emerging logic and memory devices and related architectures. The primary focus is on mapping device-specific properties, such as multi-functionality, runtime polymorphism, intrinsic entropy, nonlinearity, ease of heterogeneous integration, and tamper-resilience to the corresponding security primitives that they help realize, such as static and dynamic camouflaging, true random number generation, physically unclonable functions, secure heterogeneous and large-scale systems, and tamper-proof memories. The authors discuss several device technologies offering the desired properties (including spintronics switches, memristors, silicon nanowire transistors and ferroelectric devices) for such security primitives and schemes, while also providing a detailed case study for each of the outlined security applications. Overall, the book gives a holistic perspective of how the promising properties found in emerging devices, which are not readily afforded by traditional CMOS devices and systems, can help advance the field of hardware security.
Nikhil Rangarajan is a Postdoctoral Associate with the Design-for-Excellence Lab in the Division of Engineering, New York University Abu Dhabi, UAE. He received the M.S. and Ph.D. degrees in Electrical Engineering from New York University, NY, USA. Prior to his graduate studies, he completed his Bachelors in Electrical and Electronics Engineering from National Institute of Technology Tiruchirapalli, India. His research interests include spintronics, nanoelectronics, device physics, and hardware security. Recently, he has been working on the security promises of emerging devices in neuromorphic computation and secure storage applications.
Satwik Patnaik received the B.E. degree in electronics and telecommunications from the University of Pune, India, the M.Tech. degree in computer science and engineering with a specialization in VLSI design from the Indian Institute of Information Technology and Management, Gwalior, India, and the Ph.D. degree in Electrical engineering from Tandon School of Engineering, New York University, Brooklyn, NY, USA in September 2020. He is currently a Post-Doctoral Researcher with the Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX, USA. His current research interests include security of integrated circuits, IP protection techniques, and the usage of Machine Learning to solve hardware security problems. Further, his research delves into exploring the security properties of 3D architectures, leveraging the 3D paradigm for enhancing security, exploring security properties of emerging and up-and-coming devices, and side-channel evaluation. He received the Bronze Medal in the Graduate Category at the ACM/SIGDA Student Research Competition held at ICCAD 2018, and the Best Paper Award at the Applied Research Competition held in conjunction with Cyber Security Awareness Week, in 2017.
Johann Knechtel received the M.Sc. in Information Systems Engineering (Dipl.-Ing.) in 2010 and the Ph.D. in Computer Engineering (Dr.-Ing., summa cum laude) in 2014, both from TU Dresden, Germany. He is a Research Scientist at the New York University, Abu Dhabi, UAE. Dr. Knechtel was a Postdoctoral Researcher in 2015–16 at the Masdar Institute of Science and Technology, Abu Dhabi. From 2010 to 2014, he was a Ph.D. Scholar with the DFG Graduate School on “Nano- and Biotechnologies for Packaging of Electronic Systems” hosted at the TU Dresden. In 2012, he was a Research Assistant with the Dept. of Computer Science and Engineering, Chinese University of Hong Kong, China. In 2010, he was a Visiting Research Student with the Dept. of Electrical Engineering and Computer Science, University of Michigan, USA. His research interests cover VLSI Physical Design Automation, with particular focus on Emerging Technologies and Hardware Security.
Shaloo Rakheja is an assistant professor of electrical and computer engineering at the University of Illinois at Urbana-Champaign since 2019. Prior to joining UIUC, she was an assistant professor in electrical and computer engineering at New York University. She received her PhD in electrical and computer engineering from the Georgia Institute of Technology in 2012. She completed her postdoctoral research under the supervision of Prof. Dimitri Antoniadis at the Massachusetts Institute of Technology. She has contributed significantly in the area of numerical and analytic modeling of nanoscale electronic and magnetic devices for high-speed and low-power computing applications. More recently, she has been working in the field of wide bandgap and ultrawide bandgap semiconductors that are the backbone of high-power, 5G/6G, and extreme environment electronics.
Ozgur Sinanoglu is a professor of electrical and computer engineering, the director of the Design-for-Excellence Lab, and the PI of the Center for Cybersecurity at New York University AbuDhabi. He earned his B.S. degrees, one in Electrical and Electronics Engineering and one in Computer Engineering, both from Bogazici University, Turkey in 1999. He obtained his MS and PhD in Computer Science and Engineering from University of California San Diego in 2001 and 2004, respectively. He has industry experience at TI, IBM and Qualcomm, and has been with NYU Abu Dhabi since 2010. During his PhD, he won the IBM PhD fellowship award twice. He is also the recipient of the best paper awards at IEEE VLSI Test Symposium 2011 and ACM Conference on Computer and Communication Security 2013. His research interests include design-for-test, design-for-security and design-for-trust for VLSI circuits, where he has around 200 conference and journal papers, and 20 issued and pending US Patents.
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