Next-Generation High-Speed Satellite Interconnect : Disclosing the SpaceFibre Protocol - A System Perspective
Language: English
Published by Springer, 2022
- Softcover
- Used
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Zustand: Hervorragend | Sprache: Englisch | Produktart: Bücher | This book introduces the space community to the novel SpaceFibre protocol, developed under the guidance of the European Space Agency (ESA) as the forthcoming, high speed (Gbps) communication protocol for satellite on-board communication. Since SpaceFibre is expected to follow the success of its predecessor SpaceWire protocol (Mbps), the authors provide a system-level perspective for the end-user willing to adopt this latest technology for future space missions. The authors provide a complete view of the SpaceFibre protocol, together with an analysis of all the necessary hardware and software components to integrate this technology onboard a satellite. The text guides potential system adopters toward understanding the protocol, analyzing strengths, weaknesses and performances. Practical design examples and prototype performance measurements in reference scenarios are also included.
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- Title
- Next-Generation High-Speed Satellite Interconnect : Disclosing the SpaceFibre Protocol - A System Perspective
- Author
- Dinelli, Gianmarco
- Publisher
- Springer
- Publication year
- 2022
- Condition
- Hervorragend
- Binding
- Soft cover
- Language
- English
- ISBN 10
- 303077046X
- ISBN 13
- 9783030770464
- Seller catalogs
- Bücher
This book introduces the space community to the novel SpaceFibre protocol, developed under the guidance of the European Space Agency (ESA) as the forthcoming, high speed (Gbps) communication protocol for satellite on-board communication. Since SpaceFibre is expected to follow the success of its predecessor SpaceWire protocol (Mbps), the authors provide a system-level perspective for the end-user willing to adopt this latest technology for future space missions. The authors provide a complete view of the SpaceFibre protocol, together with an analysis of all the necessary hardware and software components to integrate this technology onboard a satellite. The text guides potential system adopters toward understanding the protocol, analyzing strengths, weaknesses and performances. Practical design examples and prototype performance measurements in reference scenarios are also included.
"Synopsis" may belong to another edition of this title.
About the Author
Gianmarco Dinelli received the M.Sc. degree in Electronic Engineering cum Laude from the University of Pisa. He is a PhD candidate of the VLSI lab pf the Department of Information Engineering of Pisa University. His work is mainly related to digital system design, from system specifications to hardware implementation on an FPGA device. His research interests are mainly focused on satellite data-handling subsystem and on FPGA-based hardware accelerators for machine learning on the edge applications.
Luca Dello Sterpaio graduated from the University of Pisa, where he achieved his Master of Science degree in Electronic Engineering in June 2016. After four months as Research Fellow at Dept. of Information Engineering, he enrolled in the University of Pisa PhD program. His research activity is mainly focused on the hardware and software digital design for communications in the aerospace field of applications. Heis currently the manager of SpaceFibre based technology at IngeniArs S.r.l. Luca is also a Certified LabVIEW Developer (CLD).
Antonino Marino received the M.Sc. degree in Electronic Engineering from University of Pisa in May of 2016 with a thesis on design and verification of test-equipment for SpaceFibre standard. He is a PhD candidate in the VLSI lab of the Information Department, University of Pisa. He has gained valuable experience on the State-of-the-Art spacecraft's onboard communication standard such as SpaceWire and SpaceFibre. He has considerable experiences in Embedded System development and HW/SW co-design flow. His research interests are focused on the development of innovative test equipment for spacecraft onboard communication protocol and in the development of digital design on different FPGA technologies. He has considerable experience in LabVIEW.
Luca Fanucci received the Laurea and the Ph.D. degrees in Electronic Engineeringfrom University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with the European Space Agency - ESTEC, Noordwijk (NL), as research fellow. From 1996 to 2004 he was a senior researcher of the Italian National Research Council in Pisa. Since 2004, he has been a professor of Electronics at the Department of Information Engineering, first as associate professor and then as full professor. His research interests include several aspects of design technologies for integrated circuits and electronic systems, with emphasis on system-level design, hardware/software co-design and sensor conditioning and data fusion. The main application areas are telecommunications, earth and space vehicles, medical systems and technological aids for disabled and elderly people. He is co-author of over 400 international journal and conference papers and co-inventor of more than 40 national and international patents or patents pending. He served in several technical programme committees of international conferences. He was Program Chair of DSD 2008 and DATE 2014 and General Chair of DATE 2016 and HiPEAC 2020. He is a member of the editorial board of IOS Press Technology and
Disability Journal. He is a Fellow of the Institute of Electrical and Electronic Engineers and a DATE Fellow.
"About the title" may belong to another edition of this title.
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