The second half of the twentieth century and the beginning of the twenty ?rst have been characterized by the most impressive industrial revolution ever seen. In - proximately 40years, the complexity of integrated circuits (ICs) has increased by a 9 factor of 10 , with a corresponding reduction of the cost per bit by eight orders of magnitude. Not only has this evolution allowed dramatic progress in allscienti?c ?elds (large computers, space probes, etc.), but also has fueled the economic development with the raise of new markets (personal computers, cellular phones, etc.) and even social revolutions (world wide web, global village, etc.). In last years, however, the situation has signi?cantly changed: the continuous scaling down of device size has eventually brought the IC major technique, p- tolithography, to its limits. Overcoming its original limits has been proved to be possible, but the price to pay for that has changed the playing rules – while at the beginning of the IC history the evolution was driven by technology, now it is driven by economy, the cost of a medium size production plant being in the range of a few billion dollars.
Gianfranco ("GF") Cerofolini (degree in Physics from the University of Milan, 1970) is visiting researcher at the University of Milano-Bicocca. His major interests are addressed to the physical limits of miniaturization and to the 'emergence' of higher-level phenomena from the underlying lower-level substrate (measurement in quantum mechanics, life in biological systems, etc.).
Although his research activity has been carried out in the industry (vacuum: SAES Getters; telecommunication: Telettra; chemistry and energetics: ENI; integrated circuits: STMicroelectronics), he has had frequent collaborations with academic centers (University of Lublin, IMEC, Stanford University, City College of New York, several Italian Universities), has been lecturer in a few Universities (Pisa, Modena, and Polytechnic of Milan), and currently is lecturer at the University of Milano-Bicocca.
His research has covered several areas: adsorption, biophysics, CMOS processing (oxidation, diffusion, ion implantation, gettering), electronic and optical materials, theory of acidity, and nanoelectronics.
A gettering technique of widespread use in microelectronics, the complete setting of ST's first silicon-gate CMOS process, the development of a process for low-fluence SOI, and the identification of a strategy for molecular electronics via a conservative extension of the existing microelectronic technology, are among his major industrial achievements. His main scientific results range from the preparation and characterization of ideal silicon p-n junctions and the discovery of a mechanism therein of pure generation without recombination, to the theoretical description of layer-by-layer oxidation at room temperature of silicon, and to the development of original mathematical techniques for the description of adsorption on heterogeneous or soft surfaces.
The results of his activity have been published in approximately 300 articles, chapters to books, and encyclopaedic items, and in a score of patents.
