Memory-Based Logic Synthesis

Tsutomu Sasao

ISBN 10: 1441981039 / ISBN 13: 9781441981035

Published by Springer New York Mrz 2011, 2011

About this Item

This item is printed on demand - it takes 3-4 days longer - Neuware -This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs. Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book. Describes in detail the synthesis of logic functions using memories; Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis; Shows logic design methods for index generation functions; Introduces C-measure, which specifies the complexity of Boolean functions; Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching. 204 pp. Englisch. Seller Inventory # 9781441981035

Bibliographic Details

Title: Memory-Based Logic Synthesis

Publisher: Springer New York Mrz 2011

Publication Date: 2011

Binding: Buch

Condition: Neu

About this title

Synopsis:

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.

From the Back Cover:

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs. Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book.

• Describes in detail the synthesis of logic functions using memories;
• Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis;
• Shows logic design methods for index generation functions;
• Introduces C-measure, which specifies the complexity of Boolean functions;
• Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching.