Logic Minimization Algorithms for VLSI Synthesis

Language: English

Published by Springer US, 2011

1461297842 / 9781461297840

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Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects.

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Title
Logic Minimization Algorithms for VLSI Synthesis
Author
Robert K. Brayton|Gary D. Hachtel|C. McMullen|Alberto L. Sangiovanni-Vincentelli
Publisher
Springer US
Publication year
2011
Condition
New
Binding
Soft cover
Language
English
ISBN 10
1461297842
ISBN 13
9781461297840

moluna

Greven, Germany

5-star seller

AbeBooks seller since July 9, 2020

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