Interlayer Thermal Management of High-Performance Microprocessor Chip Stacks
Language: English
Published by Cuvillier Apr 2012, 2012
- Softcover
- New
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
AbeBooks seller since January 11, 2012
Condition: New
£ 41.03
Quantity: 2 available
Add to basketItem description from seller
This item is printed on demand - it takes 3-4 days longer - Neuware -Vertical integration of integrated circuit dies offers tremendous opportunities from an architectural as well as from an economical standpoint. Memory proximity supports performance scaling, and might enable significant energy savings. Partitioning of the corresponding functionalities and technologies into individual tiers can improve yield and modularity substantially.The paradigm change of stacking active components has a direct impact on heat-removal concepts and is therefore the motivation of this thesis. A stack comprised of a single logic layer in combination with multiple memory dies was identified as the limit for traditional back-side heat removal. To minimize junction temperatures, a stacking sequence with the high heat-flux component in close proximity to the cold plate is proposed.Interlayer cooling is the only volumetric heat-removal solution that scales with the number of dies in the stack. Hence, the focus of this thesis has been to identify the potential of interlayer cooling and to provide a modeling framework. Fundamental heat-transfer building blocks, such as unit-cell geometries, fluid structure modulation, fluid focusing, as well as four-port fluid delivery supporting power-map-aware heat removal, are discussed. Moreover, the theoretical foundation was experimentally validated on resistively heated convective test cavities. Therefore, specific bonding and insulation schemes were developed. Finally, the interlayer cooling performance was demonstrated on a pyramid chip stack. 172 pp. Englisch.…
Seller Inventory # 9783954040346
Bibliographic details
- Title
- Interlayer Thermal Management of High-Performance Microprocessor Chip Stacks
- Author
- Thomas Brunschwiler
- Publisher
- Cuvillier Apr 2012
- Publication year
- 2012
- Condition
- Neu
- Binding
- Taschenbuch
- Language
- English
- ISBN 10
- 3954040344
- ISBN 13
- 9783954040346
- Item weight
- 231 grams
- Dimensions
- 210x148x10 mm
BuchWeltWeit Ludwig Meier e.K.
Bergisch Gladbach, Germany
AbeBooks seller since January 11, 2012
Shipping rates from Germany to U.S.A.
| Item | 5 to 15 business days | 5 to 15 business days |
|---|---|---|
| First item | £ 19.29 | £ 19.29 |
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BuchWeltWeit Ludwig Meier e.K.
Germany
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