Incremental Delta-Sigma ADCs : Theory, Architectures and Design
Language: English
Published by Palgrave Macmillan, 2026
- Hardcover
- New
Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
AbeBooks seller since August 14, 2006
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nach der Bestellung gedruckt Neuware - Printed after ordering - This book explores the rationale behind using incremental analog-to-digital converters (IADCs), delving into their theoretical principles, tradeoffs, and practical considerations in architectural and circuit design. The authors provide a general foundational knowledge, exploring the history of incremental operation and revising the working principle of free-running Delta-Sigma ADCs, in order to compare them with the incremental ADC. The IADC revises time- and frequency domain approaches to understand the incremental ADC as a periodically time-variant mixed-signal system. Various options for the reconstruction filter are revised together with system level design approaches and tools. The influence of non-idealities and countermeasures are analyzed and simulated. Enhanced architectures are finally explored and compared to give the reader a complete overview of the topic of Incremental ADCs.
Seller Inventory # 9783032094674
- Title
- Incremental Delta-Sigma ADCs : Theory, Architectures and Design
- Author
- Maurits Ortmanns
- Publisher
- Palgrave Macmillan
- Publication year
- 2026
- Condition
- Neu
- Binding
- Buch
- Language
- English
- ISBN 10
- 3032094674
- ISBN 13
- 9783032094674
- Item weight
- 584 grams
- Dimensions
- 241x160x19 mm
This book explores the rationale behind using incremental analog-to-digital converters (IADCs), delving into their theoretical principles, tradeoffs, and practical considerations in architectural and circuit design. The authors provide a general foundational knowledge, exploring the history of incremental operation and revising the working principle of free-running Delta-Sigma ADCs, in order to compare them with the incremental ADC. The IADC revises time- and frequency domain approaches to understand the incremental ADC as a periodically time-variant mixed-signal system. Various options for the reconstruction filter are revised together with system level design approaches and tools. The influence of non-idealities and countermeasures are analyzed and simulated. Enhanced architectures are finally explored and compared to give the reader a complete overview of the topic of Incremental ADCs.
"Synopsis" may belong to another edition of this title.
About the Author
Maurits Ortmanns received the Dr.-Ing. degree in microsystems engineering from the University of Freiburg, Germany, in 2004. From 2004 - 2005, he has been with sci-worx GmbH, Hannover, Germany, working on implantable electronics. In 2006, he was appointed Assistant Professor for Integrated Interface Circuits at the University of Freiburg. Since 2008, Prof. Ortmanns is full professor at the University of Ulm, where he heads the Institute of Microelectronics. Prof. Ortmanns' main research interests include mixed signal integrated circuit design, self-correcting and reconfigurable analog circuits, with special emphasis on data converters and implantable electronics.
Prof. Ortmanns received the VDI and the VDE award in 1999, Best Student Paper Awards at MWSCAS 2009, SampTA 2011, BioCAS 2019, the ITG Publication Award 2015, best demo awards at ICECS 2016 and SENSORS 2017, best paper award at BioCAS 2019 and at ESSCIRC 2023. He served as program committee member of ESSCirC, DATE, ICECS, and ECCTD, as Associate Editor of the IEEE Transactions
of Circuits and Systems I and II, and as Guest and Associate Editor of the IEEE Journal Solid State Circuits.
Prof. Ortmanns was a Technical Program and Executive Committee member of the IEEE International Solid- State Circuits Conference (ISSCC) between 2012-2016, the European Regional Chair of ISSCC 2015, and he was Analog Subcom Chair of ISSCC from 2021-2023. He is the TPC Chair of IEEE ESSERC in 2025. He served as Distinguished Lecturer for SSCS from 2018-2019, and again from 2024-2025. He is a founding
member of SSCD. He holds numerous patents, is author of the book “Continuous-Time Sigma-Delta A/D Conversion” and several other book chapters, and he contributed about 400 IEEE journal and conference papers.
Paul Kaesser received the B.Sc. and M.Sc. degrees in electrical engineering from the University of Ulm, Ulm, Germany, in 2018 and 2021, respectively, where he is currently pursuing the Ph.D. degree with the Institute of Microelectronics, under the supervision of Prof. Maurits Ortmanns. His research interests include system-level modeling and optimization of sigma-delta ADCs.
Johannes Wagner received the PhD degrees in electrical engineering from the University of Ulm, Ulm, Germany, in 2021, with a focus on system-level modeling and optimization of sigma-delta modulators. He is currently a system engineer with Hensoldt, Ulm, Germany. His research interests include the system level analysis of CMOS analog and mixed-signal ICs and in particular incremental sigma-delta ADCs. He received the Best Demo Award from ICECS 2016.
"About the title" may belong to another edition of this title.
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