Improving Performance and Reducing Power with Hardware Acceleration : Static Timing Analysis Based Transformations of Combinational Logic in a High Level ASIC Synthesis Flow

Colin J. Ihrig

ISBN 10: 3639106903 ISBN 13: 9783639106909
Published by VDM Verlag Dr. Müller, 2008
Language: English
Condition: New Soft cover

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New - Soft cover

Condition: New

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