Implementation of Variable Latency Adders in Asynchronous Circuits

Language: English

Published by LAP LAMBERT Academic Publishing Apr 2014, 2014

3659530263 / 9783659530265

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This item is printed on demand - Print on Demand Titel. Neuware -Asynchronous circuit design is enjoying resurgence in the digital world, with many recent technical and practical advancements and improvements. The advantages of asynchronous systems over synchronous systems are promising. The opportunity to implement high performance data-paths is very attractive by exploiting the fact that most data-path modules have data dependent delays. In other words they compute the result faster than worst case under many input combinations. Therefore making the common case fast, asynchronous data-paths have the potential to outperform synchronous designs on average inputs. This book explains the performance advantage that can be achieved by dynamically selecting the matched delay in a bundled-data setting. It presents the implementation and analysis of a method for the design of high performance asynchronous adders called 'speculative completion' on six different 32 and 16 bit adders. The analysis on random data indicates that speculative completion yields signi¿cant performance improvements. The book describes the implementation details and the comparisons of results along with the final conclusions.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 76 pp. Englisch.…

Seller Inventory # 9783659530265

Title
Implementation of Variable Latency Adders in Asynchronous Circuits
Author
Ali Sayyed
Publisher
LAP LAMBERT Academic Publishing Apr 2014
Publication year
2014
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3659530263
ISBN 13
9783659530265
Item weight
131 grams
Dimensions
220x150x5 mm

buchversandmimpf2000

Emtmannsberg, BAYE, Germany

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