Hardware Description Language Demystified
Language: English
Published by BPB Publications, 2020
- Softcover
- New
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- Title
- Hardware Description Language Demystified
- Author
- Rajkumar Sarma
- Publisher
- BPB Publications
- Publication year
- 2020
- Condition
- New
- Binding
- PAP
- Language
- English
- ISBN 10
- 9389898048
- ISBN 13
- 9789389898040
- Item weight
- 474 grams
Key Features
Description
Hardware Description Language (HDL) allows analysis and simulation of digital logic and circuits. The HDL is an integral part of the EDA (electronic design automation) tool for PLDs, microprocessors, and ASICs. So, HDL is used to describe a Digital System. The combinational and sequential logic circuits can be described easily using HDL. Verilog HDL, standardized as IEEE 1364, is a hardware description language used to model electronic systems.
This book is a comprehensive guide about the digital system and its design using various VLSI design tools as well as Verilog HDL. The step-wise procedure to use various VLSI tools such as Xilinx, Vivado, Cadence NC-SIM, is covered in this book. It also explains the advanced concept such as User Define Primitives (UDP), switch level modeling, reconfigurable computing, etc. Finally, this book ends with FPGA based prototyping of the digital system.
By the end of this book, you will understand everything related to digital system design.
What will you learn
Who this book is for
Anyone interested in Electronics and VLSI design and want to learn Digital System Design with Verilog HDL will find this book useful. IC developers can also use this book as a quick reference for Verilog HDL fundamentals & features.
Table of Contents
1. An Introduction to VLSI Design Tools
2. Need of Hardware Description Language (HDL)
3. Logic Gate Implementation in Verilog HDL
4. Adder-Subtractor Implementation Using Verilog HDL
5. Multiplexer/Demultiplexer Implementation in Verilog HDL
6. Encoder/Decoder Implementation Using Verilog HDL
7. Magnitude Comparator Implementation Using Verilog HDL
8. Flip-Flop Implementation Using Verilog HDL
9. Shift Registers Implementation Using Verilog HDL
10. Counter Implementation Using Verilog HDL
11. Shift Register Counter Implementation Using Verilog HDL
12. Advanced Modeling Techniques
13. Switch Level Modeling
14. FPGA Prototyping in Verilog HDL
About the Author
Dr. Cherry Bhargava is working as an associate professor and head, VLSI domain, School of Electrical and Electronics Engineering at Lovely Professional University, Punjab, India. She has more than 14 years of teaching and research experience. She is Ph.D. (ECE), IKGPTU, M.Tech (VLSI Design & CAD) Thapar University and B.Tech (Electronics and Instrumentation) from Kurukshetra University. She is GATE qualified with All India Rank 428.
She has authored about 50 technical research papers in SCI, Scopus indexed quality journals, and national/international conferences.
Dr. Rajkumar Sarma received his B.E. in Electronics and Communications Engineering from Vinayaka Mission’s University, Salem, India & M.Tech degree from Lovely Professional University, Phagwara, Punjab and currently pursuing Ph.D. from Lovely Professional University, Phagwara, Punjab.
"Synopsis" may belong to another edition of this title.
About the Author
"About the title" may belong to another edition of this title.
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