Fundamentals of Digital Logic with VHDL Design

Vranesic

ISBN 10: 0071161686 / ISBN 13: 9780071161688

Published by McGraw Hill Higher Education, 2000

About this Item

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Bibliographic Details

Title: Fundamentals of Digital Logic with VHDL ...

Publisher: McGraw Hill Higher Education

Publication Date: 2000

Binding: Paperback

Condition: Good

About this title

Synopsis:

This book is intended for an introductory course in digital logic design, which is a basic course in most Electrical and Computer Engineering programs. The authors provide a desirable balance between classical and modern design approaches. Basic concepts are introduced using simple logic circuits, which are designed by using both manual techniques and modern CAD-tool-based methods. Having established the fundamental concepts, more complex, realistic circuits are then designed with the CAD tools. The IEEE standard VHDL language is an integral part of design techniques used throughout the book. Altera's advanced Max plus II CAD system (on CD-ROM) and a series of step-by-step tutorials are included.

From the Publisher:

Numerous detailed examples, ranging from circuits with only a few basic logic elements to digital systems such as a simple processor.
An in-depth presentation of modern digital circuit technology with an emphasis on CMOS circuits and Programmable Logic Devices (CPLDs and FPGAs).
The IEEE standard VHDL language is an integral part of design techniques used throughout the book. The language is introduced gradually in a way that is easily understood by beginning designers.
Altera's advanced MAX+plusII CAD system (on CD-ROM) and a series of step-by-step tutorials are included. The CD-ROM also contains all design examples presented in the book.
The book is modern in that it emphasizes field programmable devices (FPDs). These are widely used in practice and students are likely to encounter them in their careers. The use of FPDs also grants students the opportunity to implement the designs given in the book in actual chips, in a laboratory setting.