Functional Design Errors in Digital Circuits
Language: English
Published by Springer Netherlands Okt 2010, 2010
- Softcover
- New
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
AbeBooks seller since January 11, 2012
Condition: New
£ 132.59
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Add to basketItem description from seller
This item is printed on demand - it takes 3-4 days longer - Neuware -Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices. 224 pp. Englisch. …
Seller Inventory # 9789048181124
- Title
- Functional Design Errors in Digital Circuits
- Author
- Kai-Hui Chang
- Publisher
- Springer Netherlands Okt 2010
- Publication year
- 2010
- Condition
- Neu
- Binding
- Taschenbuch
- Language
- English
- ISBN 10
- 9048181127
- ISBN 13
- 9789048181124
- Item weight
- 347 grams
- Dimensions
- 235x155x13 mm
Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.
"Synopsis" may belong to another edition of this title.
About the Author
Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors
"About the title" may belong to another edition of this title.
BuchWeltWeit Ludwig Meier e.K.
Bergisch Gladbach, Germany
AbeBooks seller since January 11, 2012
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