Functional Design Errors in Digital Circuits (Hardcover)

Kai-hui Chang

ISBN 10: 1402093640 / ISBN 13: 9781402093647

Published by Springer-Verlag New York Inc., New York, NY, 2008

About this Item

Hardcover. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices. Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. (2) an RTL error diagnosis method that identifies the root cause of errors directly; Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.

Seller Inventory # 9781402093647

Bibliographic Details

• Title: Functional Design Errors in Digital Circuits (Hardcover)
• Publisher: Springer-Verlag New York Inc., New York, NY
• Publication Date: 2008
• Language: English
• ISBN 10: 1402093640
• ISBN 13: 9781402093647
• Binding: Hardcover
• Condition: new

About this title

Synopsis

Functional Design Errors in Digital Circuits Diagnosis covers a wide spectrum of innovative methods to automate the debugging process throughout the design flow: from Register-Transfer Level (RTL) all the way to the silicon die. In particular, this book describes: (1) techniques for bug trace minimization that simplify debugging; (2) an RTL error diagnosis method that identifies the root cause of errors directly; (3) a counterexample-guided error-repair framework to automatically fix errors in gate-level and RTL designs; (4) a symmetry-based rewiring technology for fixing electrical errors; (5) an incremental verification system for physical synthesis; and (6) an integrated framework for post-silicon debugging and layout repair. The solutions provided in this book can greatly reduce debugging effort, enhance design quality, and ultimately enable the design and manufacture of more reliable electronic devices.

About the Author

Winner of the EDAA (European Design Automation Association) Outstanding Monograph Award in the Verification section. Co-authors Bertacco and Markov are existing Springer authors