Fault Tolerant Architectures for Cryptography and Hardware Security
Language: English
Published by Springer Nature Singapore Apr 2018, 2018
Series: Book 5 of 13 - Computer Architecture and Design Methodologies
- Hardcover
- New
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
AbeBooks seller since January 11, 2012
Condition: New
£ 130.57
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Add to basketItem description from seller
This item is printed on demand - it takes 3-4 days longer - Neuware -This book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography. It offers insights into how the fault tolerance theories developed in the book can actually be implemented, with a particular focus on a wide spectrum of fault models and practical fault injection techniques, ranging from simple, low-cost techniques to high-end equipment-based methods. It then individually examines fault attack vulnerabilities in symmetric, asymmetric and authenticated encryption systems. This is followed by extensive coverage of countermeasure techniques and fault tolerant architectures that attempt to thwart such vulnerabilities. Lastly, it presents a case study of a comprehensive FPGA-based fault tolerant architecture for AES-128, which brings together of a number of the fault tolerance techniques presented. It concludes with a discussion on how fault tolerance can be combined with side channel security to achieve protection against implementation-based attacks. The text is supported by illustrative diagrams, algorithms, tables and diagrams presenting real-world experimental results. 252 pp. Englisch.…
Seller Inventory # 9789811013867
- Title
- Fault Tolerant Architectures for Cryptography and Hardware Security
- Author
- Debdeep Mukhopadhyay
- Publisher
- Springer Nature Singapore Apr 2018
- Publication year
- 2018
- Condition
- Neu
- Binding
- Buch
- Language
- English
- ISBN 10
- 9811013861
- ISBN 13
- 9789811013867
- Item weight
- 547 grams
- Dimensions
- 241x160x20 mm
- Series
- Book 5 of 13: Computer Architecture and Design Methodologies
"Synopsis" may belong to another edition of this title.
About the Author
Debdeep Mukhopadhyay is currently an Associate Professor at the Department of Computer Science and Engineering, Indian Institute of Technology at Kharagpur, India. At IIT Kharagpur he initiated the Secured Embedded Architecture Laboratory (SEAL), with a focus on Embedded Security and Side Channel Attacks. Prior to this, he worked as a visiting Associate Professor of NYU-Shanghai. He had also served as an Assistant Professor at IIT Madras, India and as a Visiting Researcher at NYU Polytechnic School of Engineering under the Indo-US STF Fellowship. He holds a PhD, an MS, and a B. Tech from IIT Kharagpur, India. Mukhopadhyay’s research interests are Cryptography, Hardware Security, and VLSI. His books include Cryptography and Network Security (Mc Graw Hills), Hardware Security: Design, Threats, and Safeguards (CRC Press), and Timing Channels in Cryptography (Springer). He has written more than 100 papers in peer-reviewed conferences and journals and has collaborated with several Indian and Foreign Organizations. Mukhopadhyay is the recipient of the prestigious Young Scientist award from the Indian National Science Academy, the Young Engineer award from the Indian National Academy of Engineers, and is the Young Associate of the Indian Academy of Science. He was also awarded the Outstanding Young Faculty fellowship in 2011 from IIT Kharagpur, and the Techno-Inventor Best PhD award by the Indian Semiconductor Association.
"About the title" may belong to another edition of this title.
BuchWeltWeit Ludwig Meier e.K.
Bergisch Gladbach, Germany
AbeBooks seller since January 11, 2012
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