Equivalence Checking of Digital Circuits

Janett Mohnke

ISBN 10: 1402077254 / ISBN 13: 9781402077258

Published by Springer US, Copernicus Jan 2004, 2004

About this Item

This item is printed on demand - Print on Demand Titel. Neuware -Hardware veri cation is the process of checking whether a design conforms to its speci cations of functionality and timing. In today¿s design processes it becomes more and more important. Very large scale integrated (VLSI) circuits and the resulting digital systems have conquered a place in almost all areas of our life, even in security sensitive applications. Complex digital systems control airplanes, have been used in banks and on intensive-care units. Hence, the demand for error-free designs is more important than ever. In addition, economic reasons underline this demand as well. The design and production process of present day VLSI-circuits is highly time- and cost-intensive. Mo- over, it is nearly impossible to repair integrated circuits. Thus, it is desirable to detect design errors early in the design process and not just after producing the prototype chip. All these facts are re ected by developing and prod- tion statistics of present day companies. For example, In neon Technologies [118] assumed that about 60% to 80% of the overall design time was spent for veri cation in 2000. Other sources cite the 3-to-1 head count ratio between veri cation engineers and logic designers. This shows that verifying logical correctness of the design of hardware systems is a major gate to the problem of time-to-market (cf. [113]). With the chip complexity constantly increasing, the dif culty as well as the - portance of functional veri cation of new product designs has been increased. It is not only more important to get error-free designs.Springer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 280 pp. Englisch.

Seller Inventory # 9781402077258

Bibliographic Details

• Title: Equivalence Checking of Digital Circuits
• Publisher: Springer US, Copernicus Jan 2004
• Publication Date: 2004
• Language: English
• ISBN 10: 1402077254
• ISBN 13: 9781402077258
• Binding: Buch
• Condition: Neu
• Dimensions: 241W x 160H x 20D millimeters 241 millimeters width by 160 millimeters height by 20 millimeters depth
• Weight: 588 grams

About this title

Synopsis

With the chip complexity constantly increasing, the difficulty as well as the importance of functional verification of new product designs has been increased. It is not only more important to get error-free designs. Moreover, it becomes an increasingly difficult task for a team of human designers to carry out a full design without errors. The traditional training of new verification engineers has to be adapted to the new situation. New skills are necessary. For these reasons, nearly all major universities offer lectures on basic verification techniques such as propositional temporal logic, model checking, equivalence checking, and simulation coverage measures. The present book is designed as a textbook covering one of the most important aspects in the verification process -- equivalence checking of Boolean circuits. Equivalence Checking of Digital Circuits is a textbook for advanced students in electrical and computer engineering, but is also intended for researchers who will find it useful as a reference text.

Product Description

Equivalence Checking of Digital Circuits With an increase in chip complexity, the difficulty as well as the importance of functional verification of product designs has increased. This book is designed as a textbook covering an important aspect in the verification process. It is useful as a textbook for advanced students in electrical and computer engineering.