Energy Efficient Design Techniques On FPGA

Shivani Madhok|Bishwajeet Pandey

ISBN 10: 3659357707 / ISBN 13: 9783659357701

Published by LAP LAMBERT Academic Publishing, 2015

About this Item

Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Madhok ShivaniShivani Madhok is an associate director of Gyancity Research lab. She has worked with researcher of more than 11 countries and have published 22 research papers in Springer, IEEE sponsored international conference. She . Seller Inventory # 18361300

Bibliographic Details

Title: Energy Efficient Design Techniques On FPGA

Publisher: LAP LAMBERT Academic Publishing

Publication Date: 2015

Binding: Soft cover

Condition: New

About this title

Synopsis:

In this book we have designed 64 bit decoder, Internet of things (IoT)enable decoder, Energy Efficient Traffic Light Controller, Sensor based automatic barricades on public railway crossing, mobile charge sensor using LVCMOS IO Standard, Bio- Medical Wrist Watch, Unicode Reader of Greek, Latin and Sindhi, Digital Clock and FIR Filter using Verilog. And, we are using Design Goal, Capacitance Scaling, Frequency Scaling, Thermal Aware Design Approach, Clock Gating, Voltage Scaling, LVCMOS IO Standards, HSTL IO Standards, and SSTL IO Standards. We are using 28nm, 40nm Technology based latest Virtex-6, Kintex-7 and Artix-7 FPGA.We are using XPower Analyzer for Power Estimation and Xilinx for simulation of Hardware Description Language. In summary, we have covered more than 10 different Circuits and 10 different energy efficient technique that will help researcher, learner to learn these technique and apply these technique in their own design in order to make energy efficient design with Verilog.