Efficient Hardware Implementation of an Advanced Turbo Decoder : An ASIC Implementation

Language: English

Published by LAP Lambert Academic Publishing, 2012

3847308556 / 9783847308553

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Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH

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nach der Bestellung gedruckt Neuware - Printed after ordering - Turbo decoder is a key component of the emerging 3G mobile communication. The focus of this work is towards developing an application specific integrated circuit for an advanced turbo decoder. The methodology starts from RTL models which can be used for software solution and proceeds towards hardware implementation. In the current project work, Turbo encoder and turbo decoder with SOVA and log-MAP decoding algorithms were modelled from algorithmic level, concentrating on the functional correctness rather than on implementation architecture. The effect on performance due to variation in parameters like frame length, number of iterations, type of encoding scheme and type of the interleaver in the presence of additive white Gaussian noise, using MATLAB. The hardware of the Turbo decoder has been modelled in VHDL, simulated in VCS, synthesized using Design compiler and physical implementation has been carried out using IC Compiler.…

Seller Inventory # 9783847308553

Title
Efficient Hardware Implementation of an Advanced Turbo Decoder : An ASIC Implementation
Author
Naresh Kumar Venkatesh
Publisher
LAP Lambert Academic Publishing
Publication year
2012
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
3847308556
ISBN 13
9783847308553
Item weight
159 grams
Dimensions
220x176x33 mm

AHA-BUCH GmbH

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